arc: add dependences on MMU presence

Depending on MMU presence in CPU there're differences in HW behavior.
For example address of instruction that caused exception is put in
ECR register if MMU exists and in ERET register otherwise.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
master
Alexey Brodkin 10 years ago
parent c0e9535e1d
commit dcb431e723
  1. 4
      arch/arc/config.mk
  2. 18
      arch/arc/cpu/arc700/start.S

@ -21,6 +21,10 @@ ifeq ($(CROSS_COMPILE),)
CROSS_COMPILE := $(ARC_CROSS_COMPILE)
endif
ifdef CONFIG_ARC_MMU_VER
CONFIG_MMU = 1
endif
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
# Needed for relocation

@ -78,6 +78,16 @@
PUSHAX %erbta
.endm
.macro SAVE_EXCEPTION_SOURCE
#ifdef CONFIG_MMU
/* If MMU exists exception faulting address is loaded in EFA reg */
lr %r0, [%efa]
#else
/* Otherwise in ERET (exception return) reg */
lr %r0, [%eret]
#endif
.endm
.align 4
.globl _start
_start:
@ -102,13 +112,13 @@ _start:
memory_error:
SAVE_ALL_SYS
lr %r0, [%efa]
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_memory_error
instruction_error:
SAVE_ALL_SYS
lr %r0, [%efa]
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_instruction_error
@ -119,7 +129,7 @@ interrupt_handler:
EV_MachineCheck:
SAVE_ALL_SYS
lr %r0, [%efa]
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_machine_check_fault
@ -135,7 +145,7 @@ EV_TLBMissD:
EV_TLBProtV:
SAVE_ALL_SYS
lr %r0, [%efa]
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_tlb_prot_violation

Loading…
Cancel
Save