As we have now V3s support in board code, the V3s DTSI file should also be added. Add also some CCU include headers to satisfy the DTSI file. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>master
parent
c199489f17
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/* |
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* Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> |
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* |
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* This file is dual-licensed: you can use it either under the terms |
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* of the GPL or the X11 license, at your option. Note that this dual |
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* licensing only applies to this file, and not this project as a |
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* whole. |
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* |
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* a) This file is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of the |
||||
* License, or (at your option) any later version. |
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* |
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* This file is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* Or, alternatively, |
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* |
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* b) Permission is hereby granted, free of charge, to any person |
||||
* obtaining a copy of this software and associated documentation |
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* files (the "Software"), to deal in the Software without |
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* restriction, including without limitation the rights to use, |
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* copy, modify, merge, publish, distribute, sublicense, and/or |
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* sell copies of the Software, and to permit persons to whom the |
||||
* Software is furnished to do so, subject to the following |
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* conditions: |
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* |
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* The above copyright notice and this permission notice shall be |
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* included in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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* OTHER DEALINGS IN THE SOFTWARE. |
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*/ |
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|
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#include <dt-bindings/clock/sun8i-v3s-ccu.h> |
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#include <dt-bindings/reset/sun8i-v3s-ccu.h> |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <dt-bindings/pinctrl/sun4i-a10.h> |
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|
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/ { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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interrupt-parent = <&gic>; |
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|
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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|
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cpu@0 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <0>; |
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clocks = <&ccu CLK_CPU>; |
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}; |
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}; |
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|
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timer { |
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compatible = "arm,armv7-timer"; |
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
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}; |
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|
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clocks { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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|
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osc24M: osc24M_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <24000000>; |
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clock-output-names = "osc24M"; |
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}; |
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|
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osc32k: osc32k_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <32768>; |
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clock-output-names = "osc32k"; |
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}; |
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}; |
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|
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soc { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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|
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mmc0: mmc@01c0f000 { |
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compatible = "allwinner,sun7i-a20-mmc"; |
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reg = <0x01c0f000 0x1000>; |
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clocks = <&ccu CLK_BUS_MMC0>, |
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<&ccu CLK_MMC0>, |
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<&ccu CLK_MMC0_OUTPUT>, |
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<&ccu CLK_MMC0_SAMPLE>; |
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clock-names = "ahb", |
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"mmc", |
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"output", |
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"sample"; |
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resets = <&ccu RST_BUS_MMC0>; |
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reset-names = "ahb"; |
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interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; |
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status = "disabled"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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}; |
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|
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mmc1: mmc@01c10000 { |
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compatible = "allwinner,sun7i-a20-mmc"; |
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reg = <0x01c10000 0x1000>; |
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clocks = <&ccu CLK_BUS_MMC1>, |
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<&ccu CLK_MMC1>, |
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<&ccu CLK_MMC1_OUTPUT>, |
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<&ccu CLK_MMC1_SAMPLE>; |
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clock-names = "ahb", |
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"mmc", |
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"output", |
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"sample"; |
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resets = <&ccu RST_BUS_MMC1>; |
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reset-names = "ahb"; |
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interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; |
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status = "disabled"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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}; |
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|
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mmc2: mmc@01c11000 { |
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compatible = "allwinner,sun7i-a20-mmc"; |
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reg = <0x01c11000 0x1000>; |
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clocks = <&ccu CLK_BUS_MMC2>, |
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<&ccu CLK_MMC2>, |
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<&ccu CLK_MMC2_OUTPUT>, |
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<&ccu CLK_MMC2_SAMPLE>; |
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clock-names = "ahb", |
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"mmc", |
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"output", |
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"sample"; |
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resets = <&ccu RST_BUS_MMC2>; |
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reset-names = "ahb"; |
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interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; |
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status = "disabled"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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}; |
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|
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usb_otg: usb@01c19000 { |
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compatible = "allwinner,sun8i-h3-musb"; |
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reg = <0x01c19000 0x0400>; |
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clocks = <&ccu CLK_BUS_OTG>; |
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resets = <&ccu RST_BUS_OTG>; |
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; |
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interrupt-names = "mc"; |
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phys = <&usbphy 0>; |
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phy-names = "usb"; |
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extcon = <&usbphy 0>; |
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status = "disabled"; |
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}; |
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|
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usbphy: phy@01c19400 { |
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compatible = "allwinner,sun8i-v3s-usb-phy"; |
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reg = <0x01c19400 0x2c>, |
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<0x01c1a800 0x4>; |
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reg-names = "phy_ctrl", |
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"pmu0"; |
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clocks = <&ccu CLK_USB_PHY0>; |
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clock-names = "usb0_phy"; |
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resets = <&ccu RST_USB_PHY0>; |
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reset-names = "usb0_reset"; |
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status = "disabled"; |
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#phy-cells = <1>; |
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}; |
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|
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ccu: clock@01c20000 { |
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compatible = "allwinner,sun8i-v3s-ccu"; |
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reg = <0x01c20000 0x400>; |
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clocks = <&osc24M>, <&osc32k>; |
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clock-names = "hosc", "losc"; |
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#clock-cells = <1>; |
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#reset-cells = <1>; |
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}; |
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|
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rtc: rtc@01c20400 { |
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compatible = "allwinner,sun6i-a31-rtc"; |
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reg = <0x01c20400 0x54>; |
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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|
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pio: pinctrl@01c20800 { |
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compatible = "allwinner,sun8i-v3s-pinctrl"; |
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reg = <0x01c20800 0x400>; |
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; |
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clock-names = "apb", "hosc", "losc"; |
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gpio-controller; |
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#gpio-cells = <3>; |
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interrupt-controller; |
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#interrupt-cells = <3>; |
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|
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uart0_pins_a: uart0@0 { |
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pins = "PB8", "PB9"; |
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function = "uart0"; |
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bias-pull-up; |
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}; |
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|
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mmc0_pins_a: mmc0@0 { |
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pins = "PF0", "PF1", "PF2", "PF3", |
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"PF4", "PF5"; |
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function = "mmc0"; |
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drive-strength = <30>; |
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bias-pull-up; |
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}; |
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}; |
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timer@01c20c00 { |
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compatible = "allwinner,sun4i-a10-timer"; |
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reg = <0x01c20c00 0xa0>; |
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interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&osc24M>; |
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}; |
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|
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wdt0: watchdog@01c20ca0 { |
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compatible = "allwinner,sun6i-a31-wdt"; |
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reg = <0x01c20ca0 0x20>; |
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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uart0: serial@01c28000 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0x01c28000 0x400>; |
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
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clocks = <&ccu CLK_BUS_UART0>; |
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resets = <&ccu RST_BUS_UART0>; |
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status = "disabled"; |
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}; |
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|
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uart1: serial@01c28400 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0x01c28400 0x400>; |
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
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clocks = <&ccu CLK_BUS_UART1>; |
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resets = <&ccu RST_BUS_UART1>; |
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status = "disabled"; |
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}; |
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|
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uart2: serial@01c28800 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0x01c28800 0x400>; |
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
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clocks = <&ccu CLK_BUS_UART2>; |
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resets = <&ccu RST_BUS_UART2>; |
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status = "disabled"; |
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}; |
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|
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gic: interrupt-controller@01c81000 { |
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compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; |
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reg = <0x01c81000 0x1000>, |
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<0x01c82000 0x1000>, |
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<0x01c84000 0x2000>, |
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<0x01c86000 0x2000>; |
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interrupt-controller; |
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#interrupt-cells = <3>; |
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
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}; |
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}; |
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}; |
@ -0,0 +1,107 @@ |
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/*
|
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* Copyright (c) 2016 Icenowy Zheng <icenowy@aosc.xyz> |
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* |
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* Based on sun8i-h3-ccu.h, which is: |
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* Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> |
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* |
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* This file is dual-licensed: you can use it either under the terms |
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* of the GPL or the X11 license, at your option. Note that this dual |
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* licensing only applies to this file, and not this project as a |
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* whole. |
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* |
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* a) This file is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of the |
||||
* License, or (at your option) any later version. |
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* |
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* This file is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* Or, alternatively, |
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* |
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* b) Permission is hereby granted, free of charge, to any person |
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* obtaining a copy of this software and associated documentation |
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* files (the "Software"), to deal in the Software without |
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* restriction, including without limitation the rights to use, |
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* copy, modify, merge, publish, distribute, sublicense, and/or |
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* sell copies of the Software, and to permit persons to whom the |
||||
* Software is furnished to do so, subject to the following |
||||
* conditions: |
||||
* |
||||
* The above copyright notice and this permission notice shall be |
||||
* included in all copies or substantial portions of the Software. |
||||
* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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* OTHER DEALINGS IN THE SOFTWARE. |
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*/ |
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|
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#ifndef _DT_BINDINGS_CLK_SUN8I_V3S_H_ |
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#define _DT_BINDINGS_CLK_SUN8I_V3S_H_ |
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|
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#define CLK_CPU 14 |
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|
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#define CLK_BUS_CE 20 |
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#define CLK_BUS_DMA 21 |
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#define CLK_BUS_MMC0 22 |
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#define CLK_BUS_MMC1 23 |
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#define CLK_BUS_MMC2 24 |
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#define CLK_BUS_DRAM 25 |
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#define CLK_BUS_EMAC 26 |
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#define CLK_BUS_HSTIMER 27 |
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#define CLK_BUS_SPI0 28 |
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#define CLK_BUS_OTG 29 |
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#define CLK_BUS_EHCI0 30 |
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#define CLK_BUS_OHCI0 31 |
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#define CLK_BUS_VE 32 |
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#define CLK_BUS_TCON0 33 |
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#define CLK_BUS_CSI 34 |
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#define CLK_BUS_DE 35 |
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#define CLK_BUS_CODEC 36 |
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#define CLK_BUS_PIO 37 |
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#define CLK_BUS_I2C0 38 |
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#define CLK_BUS_I2C1 39 |
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#define CLK_BUS_UART0 40 |
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#define CLK_BUS_UART1 41 |
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#define CLK_BUS_UART2 42 |
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#define CLK_BUS_EPHY 43 |
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#define CLK_BUS_DBG 44 |
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|
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#define CLK_MMC0 45 |
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#define CLK_MMC0_SAMPLE 46 |
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#define CLK_MMC0_OUTPUT 47 |
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#define CLK_MMC1 48 |
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#define CLK_MMC1_SAMPLE 49 |
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#define CLK_MMC1_OUTPUT 50 |
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#define CLK_MMC2 51 |
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#define CLK_MMC2_SAMPLE 52 |
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#define CLK_MMC2_OUTPUT 53 |
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#define CLK_CE 54 |
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#define CLK_SPI0 55 |
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#define CLK_USB_PHY0 56 |
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#define CLK_USB_OHCI0 57 |
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|
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#define CLK_DRAM_VE 59 |
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#define CLK_DRAM_CSI 60 |
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#define CLK_DRAM_EHCI 61 |
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#define CLK_DRAM_OHCI 62 |
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#define CLK_DE 63 |
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#define CLK_TCON0 64 |
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#define CLK_CSI_MISC 65 |
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#define CLK_CSI0_MCLK 66 |
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#define CLK_CSI1_SCLK 67 |
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#define CLK_CSI1_MCLK 68 |
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#define CLK_VE 69 |
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#define CLK_AC_DIG 70 |
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#define CLK_AVS 71 |
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|
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#define CLK_MIPI_CSI 73 |
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|
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#endif /* _DT_BINDINGS_CLK_SUN8I_V3S_H_ */ |
@ -0,0 +1,78 @@ |
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/*
|
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* Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> |
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* |
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* Based on sun8i-v3s-ccu.h, which is |
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* Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> |
||||
* |
||||
* This file is dual-licensed: you can use it either under the terms |
||||
* of the GPL or the X11 license, at your option. Note that this dual |
||||
* licensing only applies to this file, and not this project as a |
||||
* whole. |
||||
* |
||||
* a) This file is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of the |
||||
* License, or (at your option) any later version. |
||||
* |
||||
* This file is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* Or, alternatively, |
||||
* |
||||
* b) Permission is hereby granted, free of charge, to any person |
||||
* obtaining a copy of this software and associated documentation |
||||
* files (the "Software"), to deal in the Software without |
||||
* restriction, including without limitation the rights to use, |
||||
* copy, modify, merge, publish, distribute, sublicense, and/or |
||||
* sell copies of the Software, and to permit persons to whom the |
||||
* Software is furnished to do so, subject to the following |
||||
* conditions: |
||||
* |
||||
* The above copyright notice and this permission notice shall be |
||||
* included in all copies or substantial portions of the Software. |
||||
* |
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
||||
* OTHER DEALINGS IN THE SOFTWARE. |
||||
*/ |
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|
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#ifndef _DT_BINDINGS_RST_SUN8I_V3S_H_ |
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#define _DT_BINDINGS_RST_SUN8I_V3S_H_ |
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|
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#define RST_USB_PHY0 0 |
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|
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#define RST_MBUS 1 |
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|
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#define RST_BUS_CE 5 |
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#define RST_BUS_DMA 6 |
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#define RST_BUS_MMC0 7 |
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#define RST_BUS_MMC1 8 |
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#define RST_BUS_MMC2 9 |
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#define RST_BUS_DRAM 11 |
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#define RST_BUS_EMAC 12 |
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#define RST_BUS_HSTIMER 14 |
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#define RST_BUS_SPI0 15 |
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#define RST_BUS_OTG 17 |
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#define RST_BUS_EHCI0 18 |
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#define RST_BUS_OHCI0 22 |
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#define RST_BUS_VE 26 |
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#define RST_BUS_TCON0 27 |
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#define RST_BUS_CSI 30 |
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#define RST_BUS_DE 34 |
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#define RST_BUS_DBG 38 |
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#define RST_BUS_EPHY 39 |
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#define RST_BUS_CODEC 40 |
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#define RST_BUS_I2C0 46 |
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#define RST_BUS_I2C1 47 |
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#define RST_BUS_UART0 49 |
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#define RST_BUS_UART1 50 |
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#define RST_BUS_UART2 51 |
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|
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#endif /* _DT_BINDINGS_RST_SUN8I_H3_H_ */ |
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