arm: ls1021a: improve the core frequency to 1.2GHZ

Change core clock to 1.2GHz in the configurations for SD and NAND boot.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
master
Yuan Yao 8 years ago committed by York Sun
parent c435a7c8c1
commit e2f95e3a6a
  1. 2
      board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
  2. 4
      board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg
  3. 4
      board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg
  4. 2
      board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg
  5. 2
      board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg

@ -1,7 +1,7 @@
#PBL preamble and RCW header
aa55aa55 01ee0100
# serdes protocol
0608000a 00000000 00000000 00000000
0608000c 00000000 00000000 00000000
60000000 00407900 e0106a00 21046000
00000000 00000000 00000000 00038000
00000000 001b7200 00000000 00000000

@ -2,13 +2,13 @@
aa55aa55 01ee0100
#enable IFC, disable QSPI and DSPI
0608000a 00000000 00000000 00000000
0608000c 00000000 00000000 00000000
60000000 00407900 60040a00 21046000
00000000 00000000 00000000 00038000
00000000 001b7200 00000000 00000000
#disable IFC, enable QSPI and DSPI
#0608000a 00000000 00000000 00000000
#0608000c 00000000 00000000 00000000
#60000000 00407900 60040a00 21046000
#00000000 00000000 00000000 00038000
#20024800 001b7200 00000000 00000000

@ -2,13 +2,13 @@
aa55aa55 01ee0100
#enable IFC, disable QSPI and DSPI
#0608000a 00000000 00000000 00000000
#0608000c 00000000 00000000 00000000
#60000000 00407900 60040a00 21046000
#00000000 00000000 00000000 00038000
#00000000 001b7200 00000000 00000000
#disable IFC, enable QSPI and DSPI
0608000a 00000000 00000000 00000000
0608000c 00000000 00000000 00000000
60000000 00407900 60040a00 21046000
00000000 00000000 00000000 00038000
20024800 001b7200 00000000 00000000

@ -2,7 +2,7 @@
aa55aa55 01ee0100
#enable IFC, disable QSPI and DSPI
0608000a 00000000 00000000 00000000
0608000c 00000000 00000000 00000000
30000000 00007900 60040a00 21046000
00000000 00000000 00000000 20000000
00080000 881b7340 00000000 00000000

@ -2,7 +2,7 @@
aa55aa55 01ee0100
#disable IFC, enable QSPI and DSPI
0608000a 00000000 00000000 00000000
0608000c 00000000 00000000 00000000
30000000 00007900 60040a00 21046000
00000000 00000000 00000000 20000000
20024800 881b7340 00000000 00000000

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