The Gen2 TMU is fed with fixed 32.5 MHz signal from CP . This is then divided by 4 in TMU. Fix the timer clock setting in Gen2. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>lime2-spi
parent
0e286c529f
commit
e83da8e880
Loading…
Reference in new issue