Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment; Signed-off-by: Po Liu <Po.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>master
Po Liu
11 years ago
committed by
York Sun
parent
6609916efb
commit
eb6b458cef
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/* Copyright 2013 Freescale Semiconductor, Inc.
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <ns16550.h> |
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#include <malloc.h> |
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#include <mmc.h> |
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#include <nand.h> |
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#include <i2c.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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ulong get_effective_memsize(void) |
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{ |
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return CONFIG_SYS_L2_SIZE; |
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} |
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void board_init_f(ulong bootflag) |
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{ |
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u32 plat_ratio; |
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
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console_init_f(); |
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/* initialize selected port with appropriate baud rate */ |
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plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; |
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plat_ratio >>= 1; |
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gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; |
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NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, |
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gd->bus_clk / 16 / CONFIG_BAUDRATE); |
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/* copy code to RAM and jump to it - this should not return */ |
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/* NOTE - code has to be copied out of NAND buffer before
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* other blocks can be read. |
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*/ |
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relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); |
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} |
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void board_init_r(gd_t *gd, ulong dest_addr) |
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{ |
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/* Pointer is writable since we allocated a register for it */ |
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gd = (gd_t *)CONFIG_SPL_GD_ADDR; |
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bd_t *bd; |
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memset(gd, 0, sizeof(gd_t)); |
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bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); |
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memset(bd, 0, sizeof(bd_t)); |
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gd->bd = bd; |
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bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; |
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bd->bi_memsize = CONFIG_SYS_L2_SIZE; |
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probecpu(); |
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get_clocks(); |
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mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, |
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CONFIG_SPL_RELOC_MALLOC_SIZE); |
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/* relocate environment function pointers etc. */ |
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nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
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(uchar *)CONFIG_ENV_ADDR); |
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gd->env_addr = (ulong)(CONFIG_ENV_ADDR); |
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gd->env_valid = 1; |
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i2c_init_all(); |
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gd->ram_size = initdram(0); |
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#ifdef CONFIG_SPL_NAND_BOOT |
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puts("TPL\n"); |
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#else |
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puts("SPL\n"); |
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#endif |
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nand_boot(); |
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} |
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@ -0,0 +1,63 @@ |
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/* Copyright 2013 Freescale Semiconductor, Inc.
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <mpc85xx.h> |
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#include <asm/io.h> |
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#include <ns16550.h> |
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#include <nand.h> |
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#include <asm/mmu.h> |
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#include <asm/immap_85xx.h> |
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#include <asm/fsl_law.h> |
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#include <asm/global_data.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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void board_init_f(ulong bootflag) |
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{ |
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u32 plat_ratio; |
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
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#if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM) |
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set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM); |
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set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM); |
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#endif |
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/* initialize selected port with appropriate baud rate */ |
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plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; |
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plat_ratio >>= 1; |
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gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; |
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NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, |
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gd->bus_clk / 16 / CONFIG_BAUDRATE); |
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puts("\nNAND boot...\n"); |
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/* copy code to RAM and jump to it - this should not return */ |
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/* NOTE - code has to be copied out of NAND buffer before
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* other blocks can be read. |
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*/ |
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relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); |
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} |
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void board_init_r(gd_t *gd, ulong dest_addr) |
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{ |
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puts("SPL\n"); |
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nand_boot(); |
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} |
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void putc(char c) |
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{ |
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if (c == '\n') |
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NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); |
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NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); |
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} |
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void puts(const char *str) |
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{ |
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while (*str) |
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putc(*str++); |
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} |
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