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@ -560,22 +560,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) |
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* otherwise, just check the speeds & feeds |
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*/ |
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if (hw_p->first_init == 0) { |
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#if defined(CONFIG_88E1111_CLK_DELAY) |
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/*
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* On some boards (e.g. ALPR) the Marvell 88E1111 PHY needs |
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* the "RGMII transmit timing control" and "RGMII receive |
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* timing control" bits set, so that Gbit communication works |
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* without problems. |
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* Also set the "Transmitter disable" to 1 to enable the |
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* transmitter. |
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* After setting these bits a soft-reset must occur for this |
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* change to become active. |
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*/ |
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miiphy_read (dev->name, reg, 0x14, ®_short); |
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reg_short |= (1 << 7) | (1 << 1) | (1 << 0); |
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miiphy_write (dev->name, reg, 0x14, reg_short); |
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#endif |
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#if defined(CONFIG_M88E1111_PHY) /* test-only: merge with CONFIG_88E1111_CLK_DELAY !!! */ |
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#if defined(CONFIG_M88E1111_PHY) |
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miiphy_write (dev->name, reg, 0x14, 0x0ce3); |
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miiphy_write (dev->name, reg, 0x18, 0x4101); |
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miiphy_write (dev->name, reg, 0x09, 0x0e00); |
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