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@ -34,16 +34,16 @@ |
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DECLARE_GLOBAL_DATA_PTR; |
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static const struct fsl_i2c *i2c_dev[4] = { |
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(struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C_OFFSET), |
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static const struct fsl_i2c_base *i2c_base[4] = { |
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(struct fsl_i2c_base *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C_OFFSET), |
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#ifdef CONFIG_SYS_FSL_I2C2_OFFSET |
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(struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C2_OFFSET), |
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(struct fsl_i2c_base *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C2_OFFSET), |
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#endif |
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#ifdef CONFIG_SYS_FSL_I2C3_OFFSET |
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(struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C3_OFFSET), |
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(struct fsl_i2c_base *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C3_OFFSET), |
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#endif |
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#ifdef CONFIG_SYS_FSL_I2C4_OFFSET |
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(struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C4_OFFSET) |
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(struct fsl_i2c_base *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C4_OFFSET) |
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#endif |
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}; |
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@ -104,7 +104,7 @@ static const struct { |
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/**
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* Set the I2C bus speed for a given I2C device |
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* |
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* @param dev: the I2C device |
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* @param base: the I2C device registers |
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* @i2c_clk: I2C bus clock frequency |
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* @speed: the desired speed of the bus |
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* |
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@ -112,7 +112,7 @@ static const struct { |
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* |
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* The return value is the actual bus speed that is set. |
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*/ |
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static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev, |
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static unsigned int set_i2c_bus_speed(const struct fsl_i2c_base *base, |
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unsigned int i2c_clk, unsigned int speed) |
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{ |
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unsigned short divider = min(i2c_clk / speed, (unsigned int)USHRT_MAX); |
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@ -173,8 +173,8 @@ static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev, |
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debug("divider:%d, est_div:%ld, DFSR:%d\n", divider, est_div, dfsr); |
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debug("FDR:0x%.2x, speed:%d\n", fdr, speed); |
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#endif |
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writeb(dfsr, &dev->dfsrr); /* set default filter */ |
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writeb(fdr, &dev->fdr); /* set bus speed */ |
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writeb(dfsr, &base->dfsrr); /* set default filter */ |
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writeb(fdr, &base->fdr); /* set bus speed */ |
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#else |
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unsigned int i; |
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@ -184,7 +184,7 @@ static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev, |
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fdr = fsl_i2c_speed_map[i].fdr; |
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speed = i2c_clk / fsl_i2c_speed_map[i].divider; |
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writeb(fdr, &dev->fdr); /* set bus speed */ |
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writeb(fdr, &base->fdr); /* set bus speed */ |
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break; |
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} |
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@ -200,7 +200,7 @@ static unsigned int get_i2c_clock(int bus) |
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return gd->arch.i2c1_clk; /* I2C1 clock */ |
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} |
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static int fsl_i2c_fixup(const struct fsl_i2c *dev) |
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static int fsl_i2c_fixup(const struct fsl_i2c_base *base) |
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{ |
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const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT); |
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unsigned long long timeval = 0; |
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@ -214,34 +214,34 @@ static int fsl_i2c_fixup(const struct fsl_i2c *dev) |
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flags = I2C_CR_BIT6; |
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#endif |
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writeb(I2C_CR_MEN | I2C_CR_MSTA, &dev->cr); |
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writeb(I2C_CR_MEN | I2C_CR_MSTA, &base->cr); |
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timeval = get_ticks(); |
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while (!(readb(&dev->sr) & I2C_SR_MBB)) { |
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while (!(readb(&base->sr) & I2C_SR_MBB)) { |
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if ((get_ticks() - timeval) > timeout) |
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goto err; |
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} |
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if (readb(&dev->sr) & I2C_SR_MAL) { |
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if (readb(&base->sr) & I2C_SR_MAL) { |
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/* SDA is stuck low */ |
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writeb(0, &dev->cr); |
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writeb(0, &base->cr); |
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udelay(100); |
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writeb(I2C_CR_MSTA | flags, &dev->cr); |
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writeb(I2C_CR_MEN | I2C_CR_MSTA | flags, &dev->cr); |
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writeb(I2C_CR_MSTA | flags, &base->cr); |
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writeb(I2C_CR_MEN | I2C_CR_MSTA | flags, &base->cr); |
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} |
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readb(&dev->dr); |
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readb(&base->dr); |
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timeval = get_ticks(); |
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while (!(readb(&dev->sr) & I2C_SR_MIF)) { |
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while (!(readb(&base->sr) & I2C_SR_MIF)) { |
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if ((get_ticks() - timeval) > timeout) |
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goto err; |
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} |
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ret = 0; |
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err: |
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writeb(I2C_CR_MEN | flags, &dev->cr); |
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writeb(0, &dev->sr); |
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writeb(I2C_CR_MEN | flags, &base->cr); |
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writeb(0, &base->sr); |
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udelay(100); |
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return ret; |
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@ -249,7 +249,7 @@ err: |
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static void fsl_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) |
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{ |
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const struct fsl_i2c *dev; |
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const struct fsl_i2c_base *base; |
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const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT); |
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unsigned long long timeval; |
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@ -260,21 +260,21 @@ static void fsl_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) |
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*/ |
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i2c_init_board(); |
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#endif |
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dev = (struct fsl_i2c *)i2c_dev[adap->hwadapnr]; |
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base = (struct fsl_i2c_base *)i2c_base[adap->hwadapnr]; |
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writeb(0, &dev->cr); /* stop I2C controller */ |
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writeb(0, &base->cr); /* stop I2C controller */ |
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udelay(5); /* let it shutdown in peace */ |
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set_i2c_bus_speed(dev, get_i2c_clock(adap->hwadapnr), speed); |
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writeb(slaveadd << 1, &dev->adr);/* write slave address */ |
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writeb(0x0, &dev->sr); /* clear status register */ |
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writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */ |
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set_i2c_bus_speed(base, get_i2c_clock(adap->hwadapnr), speed); |
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writeb(slaveadd << 1, &base->adr);/* write slave address */ |
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writeb(0x0, &base->sr); /* clear status register */ |
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writeb(I2C_CR_MEN, &base->cr); /* start I2C controller */ |
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timeval = get_ticks(); |
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while (readb(&dev->sr) & I2C_SR_MBB) { |
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while (readb(&base->sr) & I2C_SR_MBB) { |
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if ((get_ticks() - timeval) < timeout) |
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continue; |
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if (fsl_i2c_fixup(dev)) |
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if (fsl_i2c_fixup(base)) |
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debug("i2c_init: BUS#%d failed to init\n", |
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adap->hwadapnr); |
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@ -294,11 +294,12 @@ static void fsl_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) |
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static int |
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i2c_wait4bus(struct i2c_adapter *adap) |
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{ |
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struct fsl_i2c *dev = (struct fsl_i2c *)i2c_dev[adap->hwadapnr]; |
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struct fsl_i2c_base *base = |
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(struct fsl_i2c_base *)i2c_base[adap->hwadapnr]; |
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unsigned long long timeval = get_ticks(); |
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const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT); |
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while (readb(&dev->sr) & I2C_SR_MBB) { |
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while (readb(&base->sr) & I2C_SR_MBB) { |
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if ((get_ticks() - timeval) > timeout) |
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return -1; |
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} |
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@ -312,16 +313,17 @@ i2c_wait(struct i2c_adapter *adap, int write) |
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u32 csr; |
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unsigned long long timeval = get_ticks(); |
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const unsigned long long timeout = usec2ticks(CONFIG_I2C_TIMEOUT); |
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struct fsl_i2c *dev = (struct fsl_i2c *)i2c_dev[adap->hwadapnr]; |
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struct fsl_i2c_base *base = |
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(struct fsl_i2c_base *)i2c_base[adap->hwadapnr]; |
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do { |
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csr = readb(&dev->sr); |
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csr = readb(&base->sr); |
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if (!(csr & I2C_SR_MIF)) |
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continue; |
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/* Read again to allow register to stabilise */ |
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csr = readb(&dev->sr); |
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csr = readb(&base->sr); |
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writeb(0x0, &dev->sr); |
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writeb(0x0, &base->sr); |
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if (csr & I2C_SR_MAL) { |
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debug("i2c_wait: MAL\n"); |
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@ -348,13 +350,14 @@ i2c_wait(struct i2c_adapter *adap, int write) |
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static __inline__ int |
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i2c_write_addr(struct i2c_adapter *adap, u8 dev, u8 dir, int rsta) |
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{ |
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struct fsl_i2c *device = (struct fsl_i2c *)i2c_dev[adap->hwadapnr]; |
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struct fsl_i2c_base *base = |
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(struct fsl_i2c_base *)i2c_base[adap->hwadapnr]; |
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writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX |
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| (rsta ? I2C_CR_RSTA : 0), |
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&device->cr); |
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&base->cr); |
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writeb((dev << 1) | dir, &device->dr); |
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writeb((dev << 1) | dir, &base->dr); |
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if (i2c_wait(adap, I2C_WRITE_BIT) < 0) |
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return 0; |
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@ -365,11 +368,12 @@ i2c_write_addr(struct i2c_adapter *adap, u8 dev, u8 dir, int rsta) |
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static __inline__ int |
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__i2c_write(struct i2c_adapter *adap, u8 *data, int length) |
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{ |
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struct fsl_i2c *dev = (struct fsl_i2c *)i2c_dev[adap->hwadapnr]; |
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struct fsl_i2c_base *base = |
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(struct fsl_i2c_base *)i2c_base[adap->hwadapnr]; |
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int i; |
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for (i = 0; i < length; i++) { |
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writeb(data[i], &dev->dr); |
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writeb(data[i], &base->dr); |
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if (i2c_wait(adap, I2C_WRITE_BIT) < 0) |
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break; |
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@ -381,14 +385,15 @@ __i2c_write(struct i2c_adapter *adap, u8 *data, int length) |
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static __inline__ int |
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__i2c_read(struct i2c_adapter *adap, u8 *data, int length) |
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{ |
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struct fsl_i2c *dev = (struct fsl_i2c *)i2c_dev[adap->hwadapnr]; |
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struct fsl_i2c_base *base = |
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(struct fsl_i2c_base *)i2c_base[adap->hwadapnr]; |
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int i; |
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writeb(I2C_CR_MEN | I2C_CR_MSTA | ((length == 1) ? I2C_CR_TXAK : 0), |
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&dev->cr); |
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&base->cr); |
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/* dummy read */ |
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readb(&dev->dr); |
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readb(&base->dr); |
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for (i = 0; i < length; i++) { |
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if (i2c_wait(adap, I2C_READ_BIT) < 0) |
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@ -397,14 +402,14 @@ __i2c_read(struct i2c_adapter *adap, u8 *data, int length) |
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/* Generate ack on last next to last byte */ |
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if (i == length - 2) |
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writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_TXAK, |
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&dev->cr); |
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&base->cr); |
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/* Do not generate stop on last byte */ |
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if (i == length - 1) |
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writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX, |
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&dev->cr); |
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&base->cr); |
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data[i] = readb(&dev->dr); |
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data[i] = readb(&base->dr); |
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} |
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return i; |
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@ -414,7 +419,8 @@ static int |
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fsl_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr, int alen, u8 *data, |
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int length) |
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{ |
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struct fsl_i2c *device = (struct fsl_i2c *)i2c_dev[adap->hwadapnr]; |
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struct fsl_i2c_base *base = |
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(struct fsl_i2c_base *)i2c_base[adap->hwadapnr]; |
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int i = -1; /* signal error */ |
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u8 *a = (u8*)&addr; |
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int len = alen * -1; |
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@ -457,7 +463,7 @@ fsl_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr, int alen, u8 *data, |
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i = __i2c_read(adap, data, length); |
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} |
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writeb(I2C_CR_MEN, &device->cr); |
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writeb(I2C_CR_MEN, &base->cr); |
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if (i2c_wait4bus(adap)) /* Wait until STOP */ |
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debug("i2c_read: wait4bus timed out\n"); |
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@ -472,7 +478,8 @@ static int |
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fsl_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr, int alen, |
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u8 *data, int length) |
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{ |
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struct fsl_i2c *device = (struct fsl_i2c *)i2c_dev[adap->hwadapnr]; |
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struct fsl_i2c_base *base = |
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(struct fsl_i2c_base *)i2c_base[adap->hwadapnr]; |
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int i = -1; /* signal error */ |
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u8 *a = (u8*)&addr; |
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@ -484,7 +491,7 @@ fsl_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr, int alen, |
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i = __i2c_write(adap, data, length); |
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} |
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writeb(I2C_CR_MEN, &device->cr); |
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writeb(I2C_CR_MEN, &base->cr); |
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if (i2c_wait4bus(adap)) /* Wait until STOP */ |
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debug("i2c_write: wait4bus timed out\n"); |
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@ -497,12 +504,13 @@ fsl_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr, int alen, |
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static int |
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fsl_i2c_probe(struct i2c_adapter *adap, uchar chip) |
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{ |
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struct fsl_i2c *dev = (struct fsl_i2c *)i2c_dev[adap->hwadapnr]; |
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struct fsl_i2c_base *base = |
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(struct fsl_i2c_base *)i2c_base[adap->hwadapnr]; |
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/* For unknow reason the controller will ACK when
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* probing for a slave with the same address, so skip |
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* it. |
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*/ |
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if (chip == (readb(&dev->adr) >> 1)) |
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if (chip == (readb(&base->adr) >> 1)) |
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return -1; |
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return fsl_i2c_read(adap, chip, 0, 0, NULL, 0); |
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@ -511,11 +519,12 @@ fsl_i2c_probe(struct i2c_adapter *adap, uchar chip) |
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static unsigned int fsl_i2c_set_bus_speed(struct i2c_adapter *adap, |
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unsigned int speed) |
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{ |
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struct fsl_i2c *dev = (struct fsl_i2c *)i2c_dev[adap->hwadapnr]; |
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struct fsl_i2c_base *base = |
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(struct fsl_i2c_base *)i2c_base[adap->hwadapnr]; |
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writeb(0, &dev->cr); /* stop controller */ |
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set_i2c_bus_speed(dev, get_i2c_clock(adap->hwadapnr), speed); |
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writeb(I2C_CR_MEN, &dev->cr); /* start controller */ |
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writeb(0, &base->cr); /* stop controller */ |
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set_i2c_bus_speed(base, get_i2c_clock(adap->hwadapnr), speed); |
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writeb(I2C_CR_MEN, &base->cr); /* start controller */ |
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return 0; |
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} |
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