tools: mkimage: add support for Vybrid image format

This format can be flashed directly at address 0 of
the NAND FLASH, as it contains all necessary headers.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>

Makefile

@@ -845,6 +845,12 @@ endif
 %.imx: %.bin
 	$(Q)$(MAKE) $(build)=arch/arm/imx-common $@
 
+%.vyb: %.imx
+	$(Q)$(MAKE) $(build)=arch/arm/cpu/armv7/vf610 $@
+
+quiet_cmd_copy = COPY    $@
+      cmd_copy = cp $< $@
+
 u-boot.dtb: dts/dt.dtb
 	$(call cmd,copy)
 

arch/arm/config.mk

@@ -144,4 +144,7 @@ else
 ALL-y += u-boot.imx
 endif
 endif
+ifneq ($(CONFIG_VF610),)
+ALL-y += u-boot.vyb
+endif
 endif

arch/arm/cpu/armv7/vf610/Makefile

@@ -6,3 +6,8 @@
 
 obj-y	+= generic.o
 obj-y	+= timer.o
+
+MKIMAGEFLAGS_u-boot.vyb = -T vybridimage
+
+u-boot.vyb: u-boot.imx
+	$(call if_changed,mkimage)

common/image.c

@@ -161,6 +161,7 @@ static const table_entry_t uimage_type[] = {
 	{	IH_TYPE_RKIMAGE,    "rkimage",    "Rockchip Boot Image" },
 	{	IH_TYPE_RKSD,       "rksd",       "Rockchip SD Boot Image" },
 	{	IH_TYPE_RKSPI,      "rkspi",      "Rockchip SPI Boot Image" },
+	{	IH_TYPE_VYBRIDIMAGE, "vybridimage",  "Vybrid Boot Image", },
 	{	IH_TYPE_ZYNQIMAGE,  "zynqimage",  "Xilinx Zynq Boot Image" },
 	{	IH_TYPE_ZYNQMPIMAGE, "zynqmpimage", "Xilinx ZynqMP Boot Image" },
 	{	IH_TYPE_FPGA,       "fpga",       "FPGA Image" },

include/configs/pcm052.h

@@ -119,9 +119,8 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"fdt_high=0xffffffff\0" \
 	"initrd_high=0xffffffff\0" \
-	"blimg_file=u-boot.imx\0" \
-	"blsec_addr=0x81000000\0" \
-	"blimg_addr=0x81000400\0" \
+	"blimg_file=u-boot.vyb\0" \
+	"blimg_addr=0x81000000\0" \
 	"kernel_file=zImage\0" \
 	"kernel_addr=0x82000000\0" \
 	"fdt_file=zImage.dtb\0" \
@@ -163,12 +162,11 @@
 		"nand read ${kernel_addr} kernel; " \
 		"nand read ${ram_addr} root; " \
 		"bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
-	"update_bootloader_from_tftp=mtdparts default; " \
-		"nand read ${blsec_addr} bootloader; " \
-		"mw.b ${blimg_addr} 0xff 0x5FC00; " \
-		"if tftp ${blimg_addr} ${tftpdir}${blimg_file}; then " \
+	"update_bootloader_from_tftp=if tftp ${blimg_addr} "\
+		"${tftpdir}${blimg_file}; then " \
+		"mtdparts default; " \
 		"nand erase.part bootloader; " \
-		"nand write ${blsec_addr} bootloader ${filesize}; fi\0" \
+		"nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
 	"update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
 		"${kernel_file}; " \
 		"then mtdparts default; " \

include/image.h

@@ -278,6 +278,7 @@ enum {
 	IH_TYPE_ZYNQIMAGE,		/* Xilinx Zynq Boot Image */
 	IH_TYPE_ZYNQMPIMAGE,		/* Xilinx ZynqMP Boot Image */
 	IH_TYPE_FPGA,			/* FPGA Image */
+	IH_TYPE_VYBRIDIMAGE,	/* VYBRID .vyb Image */
 
 	IH_TYPE_COUNT,			/* Number of image types */
 };

tools/Makefile

@@ -89,6 +89,7 @@ dumpimage-mkimage-objs := aisimage.o \
 			os_support.o \
 			pblimage.o \
 			pbl_crc32.o \
+			vybridimage.o \
 			$(ROCKCHIP_OBS) \
 			socfpgaimage.o \
 			lib/sha1.o \

tools/vybridimage.c

@@ -0,0 +1,164 @@
+/*
+ * Image manipulator for Vybrid SoCs
+ *
+ * Derived from vybridimage.c
+ *
+ * (C) Copyright 2016  DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include "imagetool.h"
+#include <compiler.h>
+#include <image.h>
+
+/*
+ * NAND page 0 boot header
+ */
+
+struct nand_page_0_boot_header {
+	union {
+		uint32_t fcb[128];
+		uint8_t fcb_bytes[512];
+	};				/* 0x00000000 - 0x000001ff */
+	uint8_t  sw_ecc[512];		/* 0x00000200 - 0x000003ff */
+	uint32_t padding[65280];	/* 0x00000400 - 0x0003ffff */
+	uint8_t ivt_prefix[1024];	/* 0x00040000 - 0x000403ff */
+};
+
+/* signature byte for a readable block */
+
+static struct nand_page_0_boot_header vybridimage_header;
+
+static int vybridimage_check_image_types(uint8_t type)
+{
+	if (type == IH_TYPE_VYBRIDIMAGE)
+		return EXIT_SUCCESS;
+	return EXIT_FAILURE;
+}
+
+static uint8_t vybridimage_sw_ecc(uint8_t byte)
+{
+	uint8_t bit0  = (byte & (1 << 0)) ? 1 : 0;
+	uint8_t bit1  = (byte & (1 << 1)) ? 1 : 0;
+	uint8_t bit2  = (byte & (1 << 2)) ? 1 : 0;
+	uint8_t bit3  = (byte & (1 << 3)) ? 1 : 0;
+	uint8_t bit4  = (byte & (1 << 4)) ? 1 : 0;
+	uint8_t bit5  = (byte & (1 << 5)) ? 1 : 0;
+	uint8_t bit6  = (byte & (1 << 6)) ? 1 : 0;
+	uint8_t bit7  = (byte & (1 << 7)) ? 1 : 0;
+	uint8_t res = 0;
+
+	res |= ((bit6 ^ bit5 ^ bit3 ^ bit2) << 0);
+	res |= ((bit7 ^ bit5 ^ bit4 ^ bit2 ^ bit1) << 1);
+	res |= ((bit7 ^ bit6 ^ bit5 ^ bit1 ^ bit0) << 2);
+	res |= ((bit7 ^ bit4 ^ bit3 ^ bit0) << 3);
+	res |= ((bit6 ^ bit4 ^ bit3 ^ bit2 ^ bit1 ^ bit0) << 4);
+
+	return res;
+}
+
+static int vybridimage_verify_header(unsigned char *ptr, int image_size,
+			struct image_tool_params *params)
+{
+	struct nand_page_0_boot_header *hdr =
+		(struct nand_page_0_boot_header *)ptr;
+	int idx;
+
+	if (hdr->fcb[1] != 0x46434220)
+		return -1;
+	if (hdr->fcb[2] != 1)
+		return -1;
+	if (hdr->fcb[7] != 64)
+		return -1;
+	if (hdr->fcb[14] != 6)
+		return -1;
+	if (hdr->fcb[30] != 0x0001ff00)
+		return -1;
+	if (hdr->fcb[43] != 1)
+		return -1;
+	if (hdr->fcb[54] != 0)
+		return -1;
+	if (hdr->fcb[55] != 8)
+		return -1;
+
+	/* check software ECC */
+	for (idx = 0; idx < sizeof(hdr->fcb_bytes); idx++) {
+		uint8_t sw_ecc = vybridimage_sw_ecc(hdr->fcb_bytes[idx]);
+		if (sw_ecc != hdr->sw_ecc[idx])
+			return -1;
+	}
+
+	return 0;
+}
+
+static void vybridimage_set_header(void *ptr, struct stat *sbuf, int ifd,
+				struct image_tool_params *params)
+{
+	struct nand_page_0_boot_header *hdr =
+		(struct nand_page_0_boot_header *)ptr;
+	int idx;
+
+	/* fill header with 0x00 for first 56 entries then 0xff */
+	memset(&hdr->fcb[0], 0x0, 56*sizeof(uint32_t));
+	memset(&hdr->fcb[56], 0xff, 72*sizeof(uint32_t));
+	/* fill SW ecc and padding with 0xff */
+	memset(&hdr->sw_ecc[0], 0xff, sizeof(hdr->sw_ecc));
+	memset(&hdr->padding[0], 0xff, sizeof(hdr->padding));
+	/* fill IVT prefix with 0x00 */
+	memset(&hdr->ivt_prefix[0], 0x00, sizeof(hdr->ivt_prefix));
+
+	/* populate fcb */
+	hdr->fcb[1] = 0x46434220; /* signature */
+	hdr->fcb[2] = 0x00000001; /* version */
+	hdr->fcb[5] = 2048; /* page size */
+	hdr->fcb[6] = (2048+64); /* page + OOB size */
+	hdr->fcb[7] = 64; /* pages per block */
+	hdr->fcb[14] = 6; /* ECC mode 6 */
+	hdr->fcb[26] = 128; /* fw address (0x40000) in 2K pages */
+	hdr->fcb[27] = 128; /* fw address (0x40000) in 2K pages */
+	hdr->fcb[30] = 0x0001ff00; /* DBBT search area start address */
+	hdr->fcb[33] = 2048; /* BB marker physical offset */
+	hdr->fcb[43] = 1; /* DISBBM */
+	hdr->fcb[54] = 0; /* DISBB_Search */
+	hdr->fcb[55] = 8; /* Bad block search limit */
+
+	/* compute software ECC */
+	for (idx = 0; idx < sizeof(hdr->fcb_bytes); idx++)
+		hdr->sw_ecc[idx] = vybridimage_sw_ecc(hdr->fcb_bytes[idx]);
+}
+
+static void vybridimage_print_hdr_field(struct nand_page_0_boot_header *hdr,
+	int idx)
+{
+	printf("header.fcb[%d] = %08x\n", idx, hdr->fcb[idx]);
+}
+
+static void vybridimage_print_header(const void *ptr)
+{
+	struct nand_page_0_boot_header *hdr =
+		(struct nand_page_0_boot_header *)ptr;
+	int idx;
+
+	for (idx = 0; idx < 56; idx++)
+		vybridimage_print_hdr_field(hdr, idx);
+}
+
+/*
+ * vybridimage parameters
+ */
+U_BOOT_IMAGE_TYPE(
+	vybridimage,
+	"Vybrid Boot Image",
+	sizeof(vybridimage_header),
+	(void *)&vybridimage_header,
+	NULL,
+	vybridimage_verify_header,
+	vybridimage_print_header,
+	vybridimage_set_header,
+	NULL,
+	vybridimage_check_image_types,
+	NULL,
+	NULL
+);