fsl/pci: Add workaround for erratum A-005434

By default, all PEX inbound windows PEX_PEXIWARn[TRGT] are
mapped to 0xF, which is local memory. But for BSC9132, 0xF
is CCSR, 0x0 is local memory.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
master
Chunhe Lan 10 years ago committed by York Sun
parent 0f1fa36fff
commit f1a96ec1a9
  1. 3
      arch/powerpc/cpu/mpc85xx/cmd_errata.c
  2. 1
      arch/powerpc/include/asm/config_mpc85xx.h
  3. 9
      drivers/pci/fsl_pci_init.c

@ -299,6 +299,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
#ifdef CONFIG_SYS_FSL_ERRATUM_A007212
check_erratum_a007212();
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A005434
puts("Work-around for Erratum A-005434 enabled\n");
#endif
return 0;
}

@ -591,6 +591,7 @@
#define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
#define CONFIG_SYS_FSL_ERRATUM_A005125
#define CONFIG_SYS_FSL_ERRATUM_A005434
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
#define CONFIG_ESDHC_HC_BLK_ADDR

@ -49,8 +49,13 @@ static void set_inbound_window(volatile pit_t *pi,
u64 size)
{
u32 sz = (__ilog2_u64(size) - 1);
u32 flag = PIWAR_EN | PIWAR_LOCAL |
PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
#ifdef CONFIG_SYS_FSL_ERRATUM_A005434
u32 flag = 0;
#else
u32 flag = PIWAR_LOCAL;
#endif
flag |= PIWAR_EN | PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
out_be32(&pi->pitar, r->phys_start >> 12);
out_be32(&pi->piwbar, r->bus_start >> 12);

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