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@ -151,6 +151,8 @@ static void spl_ram_load_image(void) |
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void board_init_r(gd_t *dummy1, ulong dummy2) |
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{ |
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u32 boot_device; |
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int ret; |
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debug(">>spl:board_init_r()\n"); |
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#if defined(CONFIG_SYS_SPL_MALLOC_START) |
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@ -161,9 +163,21 @@ void board_init_r(gd_t *dummy1, ulong dummy2) |
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gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN; |
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gd->malloc_ptr = 0; |
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#endif |
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#ifdef CONFIG_SPL_DM |
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dm_init_and_scan(true); |
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#endif |
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if (IS_ENABLED(CONFIG_OF_CONTROL) && |
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!IS_ENABLED(CONFIG_SPL_DISABLE_OF_CONTROL)) { |
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ret = fdtdec_setup(); |
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if (ret) { |
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debug("fdtdec_setup() returned error %d\n", ret); |
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hang(); |
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} |
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} |
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if (IS_ENABLED(CONFIG_SPL_DM)) { |
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ret = dm_init_and_scan(true); |
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if (ret) { |
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debug("dm_init_and_scan() returned error %d\n", ret); |
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hang(); |
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} |
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} |
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#ifndef CONFIG_PPC |
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/*
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