Tom Rini
7 years ago
commit
f42f25dad8
@ -0,0 +1,50 @@ |
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/* |
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* Copyright (C) 2017 Synopsys, Inc. All rights reserved. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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/dts-v1/; |
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#include "skeleton.dtsi" |
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/ { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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aliases { |
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console = &uart0; |
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}; |
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cpu_card { |
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core_clk: core_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <1000000000>; |
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u-boot,dm-pre-reloc; |
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}; |
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}; |
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uart0: serial0@f0005000 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0xf0005000 0x1000>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
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}; |
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ethernet@f0008000 { |
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#interrupt-cells = <1>; |
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compatible = "altr,socfpga-stmmac"; |
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reg = <0xf0008000 0x2000>; |
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phy-mode = "gmii"; |
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}; |
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ehci@0xf0040000 { |
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compatible = "generic-ehci"; |
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reg = <0xf0040000 0x100>; |
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}; |
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ohci@0xf0060000 { |
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compatible = "generic-ohci"; |
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reg = <0xf0060000 0x100>; |
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}; |
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}; |
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@ -0,0 +1,12 @@ |
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if TARGET_HSDK |
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config SYS_BOARD |
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default "hsdk" |
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config SYS_VENDOR |
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default "synopsys" |
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config SYS_CONFIG_NAME |
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default "hsdk" |
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endif |
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@ -0,0 +1,5 @@ |
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AXS10X BOARD |
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M: Alexey Brodkin <abrodkin@synopsys.com> |
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S: Maintained |
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F: board/synopsys/hsdk/ |
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F: configs/hsdk_defconfig |
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@ -0,0 +1,7 @@ |
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#
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# Copyright (C) 2017 Synopsys, Inc. All rights reserved.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += hsdk.o
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@ -0,0 +1,74 @@ |
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/*
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* Copyright (C) 2017 Synopsys, Inc. All rights reserved. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <dwmmc.h> |
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#include <malloc.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define CREG_BASE (ARC_PERIPHERAL_BASE + 0x1000) |
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#define CREG_PAE (CREG_BASE + 0x180) |
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#define CREG_PAE_UPDATE (CREG_BASE + 0x194) |
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#define CREG_CPU_START (CREG_BASE + 0x400) |
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int board_early_init_f(void) |
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{ |
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/* In current chip PAE support for DMA is broken, disabling it. */ |
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writel(0, (void __iomem *) CREG_PAE); |
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/* Really apply settings made above */ |
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writel(1, (void __iomem *) CREG_PAE_UPDATE); |
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return 0; |
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} |
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int board_mmc_init(bd_t *bis) |
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{ |
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struct dwmci_host *host = NULL; |
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host = malloc(sizeof(struct dwmci_host)); |
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if (!host) { |
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printf("dwmci_host malloc fail!\n"); |
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return 1; |
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} |
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memset(host, 0, sizeof(struct dwmci_host)); |
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host->name = "Synopsys Mobile storage"; |
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host->ioaddr = (void *)ARC_DWMMC_BASE; |
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host->buswidth = 4; |
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host->dev_index = 0; |
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host->bus_hz = 100000000; |
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add_dwmci(host, host->bus_hz / 2, 400000); |
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return 0; |
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} |
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#define RESET_VECTOR_ADDR 0x0 |
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void smp_set_core_boot_addr(unsigned long addr, int corenr) |
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{ |
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/* All cores have reset vector pointing to 0 */ |
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writel(addr, (void __iomem *)RESET_VECTOR_ADDR); |
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/* Make sure other cores see written value in memory */ |
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flush_dcache_all(); |
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} |
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void smp_kick_all_cpus(void) |
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{ |
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#define BITS_START_CORE1 1 |
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#define BITS_START_CORE2 2 |
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#define BITS_START_CORE3 3 |
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int cmd = readl((void __iomem *)CREG_CPU_START); |
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cmd |= (1 << BITS_START_CORE1) | |
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(1 << BITS_START_CORE2) | |
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(1 << BITS_START_CORE3); |
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writel(cmd, (void __iomem *)CREG_CPU_START); |
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} |
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@ -0,0 +1,37 @@ |
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CONFIG_ARC=y |
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CONFIG_ISA_ARCV2=y |
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CONFIG_TARGET_HSDK=y |
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CONFIG_SYS_TEXT_BASE=0x81000000 |
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CONFIG_SYS_CLK_FREQ=1000000000 |
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CONFIG_DEFAULT_DEVICE_TREE="hsdk" |
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CONFIG_BOARD_EARLY_INIT_F=y |
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CONFIG_SYS_PROMPT="hsdk# " |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_FLASH is not set |
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CONFIG_CMD_MMC=y |
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CONFIG_CMD_USB=y |
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# CONFIG_CMD_SETEXPR is not set |
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CONFIG_CMD_DHCP=y |
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CONFIG_CMD_PING=y |
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CONFIG_CMD_EXT2=y |
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CONFIG_CMD_EXT4=y |
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CONFIG_CMD_EXT4_WRITE=y |
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CONFIG_CMD_FAT=y |
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CONFIG_OF_CONTROL=y |
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CONFIG_OF_EMBED=y |
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CONFIG_NET_RANDOM_ETHADDR=y |
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CONFIG_DM=y |
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CONFIG_MMC=y |
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CONFIG_MMC_DW=y |
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CONFIG_DM_ETH=y |
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CONFIG_ETH_DESIGNWARE=y |
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CONFIG_DM_SERIAL=y |
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CONFIG_SYS_NS16550=y |
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CONFIG_USB=y |
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CONFIG_DM_USB=y |
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CONFIG_USB_EHCI_HCD=y |
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CONFIG_USB_EHCI_GENERIC=y |
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CONFIG_USB_OHCI_HCD=y |
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CONFIG_USB_OHCI_GENERIC=y |
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CONFIG_USB_STORAGE=y |
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CONFIG_USE_PRIVATE_LIBGCC=y |
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@ -0,0 +1,93 @@ |
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/*
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* Copyright (C) 2017 Synopsys, Inc. All rights reserved. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef _CONFIG_HSDK_H_ |
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#define _CONFIG_HSDK_H_ |
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#include <linux/sizes.h> |
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/*
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* CPU configuration |
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*/ |
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#define ARC_PERIPHERAL_BASE 0xF0000000 |
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#define ARC_DWMMC_BASE (ARC_PERIPHERAL_BASE + 0xA000) |
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#define ARC_DWGMAC_BASE (ARC_PERIPHERAL_BASE + 0x18000) |
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/*
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* Memory configuration |
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*/ |
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
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#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 |
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#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
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#define CONFIG_SYS_SDRAM_SIZE SZ_1G |
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#define CONFIG_SYS_INIT_SP_ADDR \ |
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(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) |
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#define CONFIG_SYS_MALLOC_LEN SZ_2M |
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#define CONFIG_SYS_BOOTM_LEN SZ_32M |
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#define CONFIG_SYS_LOAD_ADDR 0x82000000 |
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/*
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* This board might be of different versions so handle it |
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*/ |
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#define CONFIG_BOARD_TYPES |
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/*
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* UART configuration |
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*/ |
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#define CONFIG_DW_SERIAL |
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#define CONFIG_SYS_NS16550_SERIAL |
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#define CONFIG_SYS_NS16550_CLK 33330000 |
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#define CONFIG_SYS_NS16550_MEM32 |
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/*
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* Ethernet PHY configuration |
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*/ |
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#define CONFIG_MII |
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/*
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* USB 1.1 configuration |
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*/ |
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#define CONFIG_USB_OHCI_NEW |
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 |
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/*
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* Environment settings |
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*/ |
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#define CONFIG_ENV_SIZE SZ_16K |
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#define CONFIG_ENV_IS_IN_FAT |
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#define FAT_ENV_INTERFACE "mmc" |
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#define FAT_ENV_DEVICE_AND_PART "0:1" |
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#define FAT_ENV_FILE "uboot.env" |
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#define CONFIG_FAT_WRITE |
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/*
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* Environment configuration |
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*/ |
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#define CONFIG_BOOTFILE "uImage" |
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#define CONFIG_BOOTARGS "console=ttyS0,115200n8" |
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#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR |
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/*
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* Console configuration |
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*/ |
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#define CONFIG_AUTO_COMPLETE |
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#define CONFIG_CMDLINE_EDITING |
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#define CONFIG_SYS_LONGHELP |
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#define CONFIG_SYS_MAXARGS 16 |
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#define CONFIG_SYS_CBSIZE SZ_256 |
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
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sizeof(CONFIG_SYS_PROMPT) + 16) |
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/*
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* Misc utility configuration |
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*/ |
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#define CONFIG_BOUNCE_BUFFER |
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#endif /* _CONFIG_HSDK_H_ */ |
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