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@ -24,19 +24,19 @@ |
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#undef DEBUG |
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#define CONFIG_405 1 /* This is a PPC405 CPU */ |
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */ |
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#define CONFIG_405 1 /* This is a PPC405 CPU */ |
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */ |
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#define CONFIG_AP1000 1 /* ...on an AP1000 board */ |
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#define CONFIG_AP1000 1 /* ...on an AP1000 board */ |
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#define CONFIG_PCI 1 |
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#define CONFIG_PCI 1 |
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#define CFG_HUSH_PARSER 1 /* use "hush" command parser */ |
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#define CFG_PROMPT "0> " |
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#define CFG_HUSH_PARSER 1 /* use "hush" command parser */ |
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#define CFG_PROMPT "0> " |
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#define CFG_PROMPT_HUSH_PS2 "> " |
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#define CONFIG_COMMAND_EDIT 1 |
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#define CONFIG_COMMAND_HISTORY 1 |
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#define CONFIG_COMMAND_EDIT 1 |
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#define CONFIG_COMMAND_HISTORY 1 |
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#define CONFIG_COMPLETE_ADDRESSES 1 |
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#define CFG_ENV_IS_IN_FLASH 1 |
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@ -50,10 +50,10 @@ |
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#endif |
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#endif |
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#define CONFIG_BAUDRATE 57600 |
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#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ |
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#define CONFIG_BAUDRATE 57600 |
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#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ |
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#define CONFIG_BOOTCOMMAND "" /* autoboot command */ |
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#define CONFIG_BOOTCOMMAND "" /* autoboot command */ |
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/* Size (bytes) of interrupt driven serial port buffer.
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* Set to 0 to use polling instead of interrupts. |
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@ -61,48 +61,47 @@ |
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*/ |
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#undef CONFIG_SERIAL_SOFTWARE_FIFO |
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#define CONFIG_BOOTARGS "console=ttyS0,57600" |
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#define CONFIG_BOOTARGS "console=ttyS0,57600" |
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
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#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
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#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
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#define CONFIG_COMMANDS ( (CONFIG_CMD_DFL & \ |
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(~CFG_CMD_RTC) & ~(CFG_CMD_I2C)) | \
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CFG_CMD_IRQ | \
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CFG_CMD_PCI | \
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CFG_CMD_DHCP | \
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CFG_CMD_ASKENV | \
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CFG_CMD_ELF | \
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CFG_CMD_PING | \
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CFG_CMD_MVENV \
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#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ |
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CFG_CMD_ASKENV | \
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CFG_CMD_DHCP | \
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CFG_CMD_ELF | \
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CFG_CMD_IRQ | \
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CFG_CMD_MVENV | \
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CFG_CMD_PCI | \
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CFG_CMD_PING \
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) |
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
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#include <cmd_confdefs.h> |
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#undef CONFIG_WATCHDOG /* watchdog disabled */ |
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#undef CONFIG_WATCHDOG /* watchdog disabled */ |
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#define CONFIG_SYS_CLK_FREQ 30000000 |
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#define CONFIG_SYS_CLK_FREQ 30000000 |
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#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */ |
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#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */ |
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/*
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* Miscellaneous configurable options |
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*/ |
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#define CFG_LONGHELP /* undef to save memory */ |
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#define CFG_LONGHELP /* undef to save memory */ |
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
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#else |
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
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#endif |
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/* usually: (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) */ |
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#define CFG_PBSIZE (CFG_CBSIZE+4+16) /* Print Buffer Size */ |
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#define CFG_MAXARGS 16 /* max number of command args */ |
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
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#define CFG_PBSIZE (CFG_CBSIZE+4+16) /* Print Buffer Size */ |
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#define CFG_MAXARGS 16 /* max number of command args */ |
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
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#define CFG_ALT_MEMTEST 1 |
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#define CFG_MEMTEST_START 0x00400000 /* memtest works on */ |
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#define CFG_MEMTEST_END 0x01000000 /* 4 ... 16 MB in DRAM */ |
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#define CFG_ALT_MEMTEST 1 |
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#define CFG_MEMTEST_START 0x00400000 /* memtest works on */ |
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#define CFG_MEMTEST_END 0x01000000 /* 4 ... 16 MB in DRAM */ |
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/*
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* If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1. |
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@ -113,84 +112,84 @@ |
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* If CFG_405_UART_ERRATA_59 and 200MHz CPU clock, |
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* set Linux BASE_BAUD to 403200. |
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*/ |
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#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */ |
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#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ |
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#define CFG_NS16550_CLK 40000000 |
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#define CFG_DUART_CHAN 0 |
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#define CFG_NS16550_COM1 (0x4C000000 + 0x1000) |
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#define CFG_NS16550_COM2 (0x4C800000 + 0x1000) |
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#define CFG_NS16550_REG_SIZE 4 |
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#define CFG_NS16550 1 |
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#define CFG_INIT_CHAN1 1 |
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#define CFG_INIT_CHAN2 0 |
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#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */ |
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#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ |
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#define CFG_NS16550_CLK 40000000 |
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#define CFG_DUART_CHAN 0 |
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#define CFG_NS16550_COM1 (0x4C000000 + 0x1000) |
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#define CFG_NS16550_COM2 (0x4C800000 + 0x1000) |
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#define CFG_NS16550_REG_SIZE 4 |
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#define CFG_NS16550 1 |
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#define CFG_INIT_CHAN1 1 |
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#define CFG_INIT_CHAN2 0 |
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/* The following table includes the supported baudrates */ |
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#define CFG_BAUDRATE_TABLE \ |
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} |
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#define CFG_LOAD_ADDR 0x00100000 /* default load address */ |
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#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ |
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#define CFG_LOAD_ADDR 0x00200000 /* default load address */ |
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#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ |
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#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
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#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
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/*-----------------------------------------------------------------------
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* Start addresses for the final memory configuration |
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* (Set up by the startup code) |
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* Please note that CFG_SDRAM_BASE _must_ start at 0 |
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*/ |
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#define CFG_SDRAM_BASE 0x00000000 |
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#define CFG_FLASH_BASE 0x20000000 |
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#define CFG_MONITOR_BASE TEXT_BASE |
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#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ |
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#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ |
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#define CFG_SDRAM_BASE 0x00000000 |
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#define CFG_FLASH_BASE 0x20000000 |
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#define CFG_MONITOR_BASE TEXT_BASE |
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#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ |
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#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ |
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/*
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* For booting Linux, the board info and command line data |
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* have to be in the first 8 MB of memory, since this is |
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* the maximum mapped by the Linux kernel during initialization. |
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*/ |
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
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/*-----------------------------------------------------------------------
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* FLASH organization |
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*/ |
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#define CFG_FLASH_CFI 1 |
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#define CFG_PROGFLASH_BASE CFG_FLASH_BASE |
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#define CFG_CONFFLASH_BASE 0x24000000 |
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#define CFG_FLASH_CFI 1 |
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#define CFG_PROGFLASH_BASE CFG_FLASH_BASE |
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#define CFG_CONFFLASH_BASE 0x24000000 |
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#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
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#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ |
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#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
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#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ |
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
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#define CFG_FLASH_PROTECTION 1 /* use hardware protection */ |
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#define CFG_FLASH_PROTECTION 1 /* use hardware protection */ |
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/* BEG ENVIRONNEMENT FLASH */ |
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#ifdef CFG_ENV_IS_IN_FLASH |
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#define CFG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */ |
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#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ |
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#define CFG_ENV_SECT_SIZE 0x20000 /* see README - env sector total size */ |
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#define CFG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */ |
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#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ |
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#define CFG_ENV_SECT_SIZE 0x20000 /* see README - env sector total size */ |
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#endif |
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/* END ENVIRONNEMENT FLASH */ |
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/*-----------------------------------------------------------------------
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* NVRAM organization |
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*/ |
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#define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */ |
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#define CFG_NVRAM_SIZE 0x1ff8 /* NVRAM size */ |
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#define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */ |
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#define CFG_NVRAM_SIZE 0x1ff8 /* NVRAM size */ |
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#ifdef CFG_ENV_IS_IN_NVRAM |
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#define CFG_ENV_SIZE 0x1000 /* Size of Environment vars */ |
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#define CFG_ENV_SIZE 0x1000 /* Size of Environment vars */ |
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#define CFG_ENV_ADDR \ |
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(CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE) /* Env */ |
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#endif |
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/*-----------------------------------------------------------------------
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* Cache Configuration |
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*/ |
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#define CFG_DCACHE_SIZE 16384 |
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#define CFG_CACHELINE_SIZE 32 |
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#define CFG_DCACHE_SIZE 16384 |
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#define CFG_CACHELINE_SIZE 32 |
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
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#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
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#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
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#endif |
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/*
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@ -199,11 +198,11 @@ |
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* BR0/1 and OR0/1 (FLASH) |
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*/ |
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#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */ |
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#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ |
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#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */ |
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#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ |
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/* Configuration Port location */ |
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#define CONFIG_PORT_ADDR 0xF0000500 |
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#define CONFIG_PORT_ADDR 0xF0000500 |
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/*-----------------------------------------------------------------------
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* Definitions for initial stack pointer and data area (in DPRAM) |
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@ -211,8 +210,8 @@ |
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#define CFG_INIT_RAM_ADDR 0x400000 /* inside of SDRAM */ |
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#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */ |
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
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#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
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/*-----------------------------------------------------------------------
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@ -226,25 +225,25 @@ |
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* |
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* Boot Flags |
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*/ |
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
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#define BOOTFLAG_WARM 0x02 /* Software reboot */ |
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
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#define BOOTFLAG_WARM 0x02 /* Software reboot */ |
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
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#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
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#endif |
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/* JFFS2 stuff */ |
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#define CFG_JFFS2_FIRST_BANK 0 |
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#define CFG_JFFS2_NUM_BANKS 1 |
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#define CFG_JFFS2_FIRST_SECTOR 1 |
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#define CFG_JFFS2_FIRST_BANK 0 |
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#define CFG_JFFS2_NUM_BANKS 1 |
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#define CFG_JFFS2_FIRST_SECTOR 1 |
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#define CONFIG_NET_MULTI |
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#define CONFIG_E1000 |
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#define CFG_ETH_DEV_FN 0x0800 |
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#define CFG_ETH_IOBASE 0x31000000 |
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#define CFG_ETH_MEMBASE 0x32000000 |
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#define CFG_ETH_DEV_FN 0x0800 |
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#define CFG_ETH_IOBASE 0x31000000 |
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#define CFG_ETH_MEMBASE 0x32000000 |
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#endif /* __CONFIG_H */ |
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