fix support for Logic SDK-LH7A404 board and clean up the LH7A404 register macros. * Patch by Matthew McClintock, 10 Jun 2004: Modify code to select correct serial clock on Sandpoint8245master
wdenk
21 years ago
parent
b54d32b40d
commit
f832d8a143
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/*
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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/*
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* Logic LH7A400-10 card engine |
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*/ |
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#ifndef __LPD7A404_10_H |
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#define __LPD7A404_10_H |
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#define CONFIG_ARM920T 1 /* arm920t core */ |
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#define CONFIG_LH7A40X 1 /* Sharp LH7A40x SoC family */ |
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#define CONFIG_LH7A404 1 /* Sharp LH7A404 SoC */ |
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/* The system clock PLL input frequency */ |
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#define CONFIG_SYS_CLK_FREQ 14745600 /* System Clock PLL Input (Hz) */ |
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/* ticks per second */ |
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#define CFG_HZ (508469) |
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/*-----------------------------------------------------------------------
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* Stack sizes |
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* |
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* The stack sizes are set up in start.S using the settings below |
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*/ |
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
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#ifdef CONFIG_USE_IRQ |
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
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#endif |
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/*-----------------------------------------------------------------------
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* Physical Memory Map |
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*/ |
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
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#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ |
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#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ |
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#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */ |
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/*-----------------------------------------------------------------------
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* FLASH and environment organization |
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*/ |
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
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#define CFG_MAX_FLASH_SECT (64) /* max number of sectors on one chip */ |
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/* timeout values are in ticks */ |
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#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */ |
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#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */ |
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/*----------------------------------------------------------------------
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* Using SMC91C111 LAN chip |
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* |
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* Default IO base of chip is 0x300, Card Engine has this address lines |
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* (LAN chip) tied to Vcc, so we just care about the chip select |
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*/ |
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#define CONFIG_DRIVER_SMC91111 |
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#define CONFIG_SMC91111_BASE (0x70000000) |
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#undef CONFIG_SMC_USE_32_BIT |
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#define CONFIG_SMC_USE_IOFUNCS |
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#endif /* __LPD7A404_10_H */ |
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@ -0,0 +1,112 @@ |
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/*
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __LPD7A404_H_ |
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#define __LPD7A404_H_ |
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#define CONFIG_LPD7A404 /* Logic LH7A400 SDK */ |
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/*
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* If we are developing, we might want to start armboot from ram |
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* so we MUST NOT initialize critical regs like mem-timing ... |
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*/ |
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#define CONFIG_INIT_CRITICAL /* undef for developing */ |
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#undef CONFIG_USE_IRQ |
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/*
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* This board uses the logic LH7A404-10 card engine |
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*/ |
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#include <configs/lpd7a404-10.h> |
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
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#define CONFIG_SETUP_MEMORY_TAGS 1 |
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#define CONFIG_INITRD_TAG 1 |
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/*
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* Size of malloc() pool |
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*/ |
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#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) |
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
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/*
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* select serial console configuration |
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*/ |
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#define CONFIG_CONSOLE_UART2 /* UART2 LH7A40x for console */ |
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/* allow to overwrite serial and ethaddr */ |
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#define CONFIG_ENV_OVERWRITE |
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#define CONFIG_BAUDRATE 115200 |
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#define CONFIG_IPADDR 192.168.1.100 |
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#define CONFIG_NETMASK 255.255.1.0 |
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#define CONFIG_SERVERIP 192.168.1.1 |
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#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */ |
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#ifndef USE_920T_MMU |
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#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING) & ~(CFG_CMD_CACHE)) |
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#else |
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#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DATE) |
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#endif |
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
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#include <cmd_confdefs.h> |
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#define CONFIG_BOOTDELAY 3 |
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
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#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
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/* what's this ? it's not used anywhere */ |
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#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ |
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#endif |
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/*
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* Miscellaneous configurable options |
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*/ |
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#define CFG_LONGHELP /* undef to save memory */ |
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#define CFG_PROMPT "LPD7A404> " /* Monitor Command Prompt */ |
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
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#define CFG_MAXARGS 16 /* max number of command args */ |
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
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#define CFG_MEMTEST_START 0xc0300000 /* memtest works on */ |
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#define CFG_MEMTEST_END 0xc0500000 /* 2 MB in DRAM */ |
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#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ |
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#define CFG_LOAD_ADDR 0xc0f00000 /* default load address */ |
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/* valid baudrates */ |
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
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/* size and location of u-boot in flash */ |
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#define CFG_MONITOR_BASE CFG_FLASH_BASE |
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#define CFG_MONITOR_LEN (256<<10) |
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#define CFG_ENV_IS_IN_FLASH 1 |
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/* Address and size of Primary Environment Sector */ |
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0xFC0000) |
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#define CFG_ENV_SIZE 0x40000 |
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#endif /* __LPD7A404_H_ */ |
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@ -0,0 +1,83 @@ |
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/*
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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/*
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* lh7a404 SoC interface |
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*/ |
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#ifndef __LH7A404_H__ |
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#define __LH7A404_H__ |
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#include "lh7a40x.h" |
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/* Interrupt Controller (userguide 8.2.1) */ |
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typedef struct { |
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volatile u32 irqstatus; |
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volatile u32 fiqstatus; |
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volatile u32 rawintr; |
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volatile u32 intsel; |
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volatile u32 inten; |
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volatile u32 intenclr; |
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volatile u32 softint; |
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volatile u32 softintclr; |
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volatile u32 protect; |
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volatile u32 unused1; |
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volatile u32 unused2; |
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volatile u32 vectaddr; |
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volatile u32 nvaddr; |
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volatile u32 unused3[32]; |
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volatile u32 vad[16]; |
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volatile u32 unused4[44]; |
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volatile u32 vectcntl[16]; |
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volatile u32 unused5[44]; |
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volatile u32 itcr; |
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volatile u32 itip1; |
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volatile u32 itip2; |
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volatile u32 itop1; |
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volatile u32 itop2; |
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volatile u32 unused6[333]; |
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volatile u32 periphid[4]; |
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volatile u32 pcellid[4]; |
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} /*__attribute__((__packed__))*/ lh7a404_vic_t; |
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#define LH7A404_VIC_BASE (0x80008000) |
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#define LH7A400_VIC_PTR(x) ((lh7a404_vic_t*)(LH7A400_VIC_BASE + (x*0x2000))) |
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typedef struct { |
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lh7a40x_dmachan_t m2p0_tx; |
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lh7a40x_dmachan_t m2p1_rx; |
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lh7a40x_dmachan_t m2p2_tx; |
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lh7a40x_dmachan_t m2p3_rx; |
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lh7a40x_dmachan_t m2m0; |
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lh7a40x_dmachan_t m2m1; |
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lh7a40x_dmachan_t unused1; |
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lh7a40x_dmachan_t unused2; |
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lh7a40x_dmachan_t m2p5_rx; |
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lh7a40x_dmachan_t m2p4_tx; |
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lh7a40x_dmachan_t m2p7_rx; |
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lh7a40x_dmachan_t m2p6_tx; |
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lh7a40x_dmachan_t m2p9_rx; |
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lh7a40x_dmachan_t m2p8_tx; |
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volatile u32 chanarb; |
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volatile u32 glblint; |
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} /*__attribute__((__packed__))*/ lh7a400_dma_t; |
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#endif /* __LH7A404_H__ */ |
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