From fabb2b4c7f28e672080a97980c4bb1a45375cbb3 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 3 Jul 2018 02:48:40 -0700
Subject: [PATCH] dm: sysreset: x86: Add a sysreset driver

This adds a generic reset driver for x86 processor.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
 drivers/sysreset/Kconfig        |  6 +++++
 drivers/sysreset/Makefile       |  1 +
 drivers/sysreset/sysreset_x86.c | 49 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 56 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_x86.c

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index f2524c1..9b2fda4 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -51,4 +51,10 @@ config SYSRESET_WATCHDOG
 	help
 	  Reboot support for generic watchdog reset.
 
+config SYSRESET_X86
+	bool "Enable support for x86 processor reboot driver"
+	depends on X86
+	help
+	  Reboot support for generic x86 processor reset.
+
 endmenu
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 223a071..707f1d7 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
+obj-$(CONFIG_SYSRESET_X86) += sysreset_x86.o
 obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c
new file mode 100644
index 0000000..5943a63
--- /dev/null
+++ b/drivers/sysreset/sysreset_x86.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Generic reset driver for x86 processor
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+
+static int x86_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	int value;
+
+	switch (type) {
+	case SYSRESET_WARM:
+		value = SYS_RST | RST_CPU;
+		break;
+	case SYSRESET_COLD:
+		value = SYS_RST | RST_CPU | FULL_RST;
+		break;
+	default:
+		return -ENOSYS;
+	}
+
+	outb(value, IO_PORT_RESET);
+
+	return -EINPROGRESS;
+}
+
+static const struct udevice_id x86_sysreset_ids[] = {
+	{ .compatible = "x86,reset" },
+	{ }
+};
+
+static struct sysreset_ops x86_sysreset_ops = {
+	.request = x86_sysreset_request,
+};
+
+U_BOOT_DRIVER(x86_sysreset) = {
+	.name = "x86-sysreset",
+	.id = UCLASS_SYSRESET,
+	.of_match = x86_sysreset_ids,
+	.ops = &x86_sysreset_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};