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fpga: zynqmp: Modify PL bitstream loading sequence

This patch modifies PL bitstream loading sequence as per
latest Xilfpga which supports all variants of bitstream images
generated from vivado and from bootgen. With this new change in
Xilfpga, uboot doesn't need to validate and swap bitstream as it will
be taken care inside Xilfpga. ZynqMP PL driver now checks for supporting
PMUFW version before skipping the validation and swap sequence as there
can be old PMUFW which doesn't supports this feature. In this case, driver
uses old way of PL bitstream loading sequence.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu 3 years ago
parent
commit
fbf7fb0f9f
2 changed files with 27 additions and 10 deletions
  1. 2 0
      arch/arm/include/asm/arch-zynqmp/sys_proto.h
  2. 25 10
      drivers/fpga/zynqmppl.c

+ 2 - 0
arch/arm/include/asm/arch-zynqmp/sys_proto.h

@@ -34,6 +34,8 @@
34 34
 
35 35
 #define ZYNQMP_PM_VERSION_INVALID	~0
36 36
 
37
+#define PMUFW_V1_0	((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
38
+
37 39
 enum {
38 40
 	IDCODE,
39 41
 	VERSION,

+ 25 - 10
drivers/fpga/zynqmppl.c

@@ -150,7 +150,8 @@ static ulong zynqmp_align_dma_buffer(u32 *buf, u32 len, u32 swap)
150 150
 			new_buf[i] = load_word(&buf[i], swap);
151 151
 
152 152
 		buf = new_buf;
153
-	} else if (swap != SWAP_DONE) {
153
+	} else if ((swap != SWAP_DONE) &&
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+		   (zynqmp_pmufw_version() <= PMUFW_V1_0)) {
154 155
 		/* For bitstream which are aligned */
155 156
 		u32 *new_buf = (u32 *)buf;
156 157
 
@@ -196,27 +197,41 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
196 197
 		     bitstream_type bstype)
197 198
 {
198 199
 	ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
199
-	u32 swap;
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+	u32 swap = 0;
200 201
 	ulong bin_buf;
201 202
 	int ret;
202 203
 	u32 buf_lo, buf_hi;
203 204
 	u32 ret_payload[PAYLOAD_ARG_CNT];
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-
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-	if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap))
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-		return FPGA_FAIL;
205
+	bool xilfpga_old = false;
206
+
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+	if (zynqmp_pmufw_version() <= PMUFW_V1_0) {
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+		puts("WARN: PMUFW v1.0 or less is detected\n");
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+		puts("WARN: Not all bitstream formats are supported\n");
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+		puts("WARN: Please upgrade PMUFW\n");
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+		xilfpga_old = true;
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+		if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap))
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+			return FPGA_FAIL;
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+		bsizeptr = (u32 *)&bsize;
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+		flush_dcache_range((ulong)bsizeptr,
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+				   (ulong)bsizeptr + sizeof(size_t));
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+		bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
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+	}
207 219
 
208 220
 	bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
209
-	bsizeptr = (u32 *)&bsize;
210 221
 
211 222
 	debug("%s called!\n", __func__);
212 223
 	flush_dcache_range(bin_buf, bin_buf + bsize);
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-	flush_dcache_range((ulong)bsizeptr, (ulong)bsizeptr + sizeof(size_t));
214 224
 
215 225
 	buf_lo = (u32)bin_buf;
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 	buf_hi = upper_32_bits(bin_buf);
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-	bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
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-	ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi,
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-			 (u32)(uintptr_t)bsizeptr, bstype, ret_payload);
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+
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+	if (xilfpga_old)
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+		ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi,
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+				 (u32)(uintptr_t)bsizeptr, bstype, ret_payload);
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+	else
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+		ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi,
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+				 (u32)bsize, 0, ret_payload);
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+
220 235
 	if (ret)
221 236
 		debug("PL FPGA LOAD fail\n");
222 237