powerpc: P1020MBG: Separate from P1_P2_RDB_PC in Kconfig

Use TARGET_P1020MBG instead of sharing with TARGET_P1_P2_RDB_PC to
simplify Kconfig and other macros.

Remove macro CONFIG_P1020MBG.

Signed-off-by: York Sun <york.sun@nxp.com>
master
York Sun 8 years ago
parent 41c7b7b132
commit fedae6ebaf
  1. 5
      arch/powerpc/cpu/mpc85xx/Kconfig
  2. 3
      board/freescale/p1_p2_rdb_pc/Kconfig
  3. 2
      board/freescale/p1_p2_rdb_pc/ddr.c
  4. 4
      board/freescale/p1_p2_rdb_pc/tlb.c
  5. 4
      configs/P1020MBG-PC_36BIT_SDCARD_defconfig
  6. 3
      configs/P1020MBG-PC_36BIT_defconfig
  7. 4
      configs/P1020MBG-PC_SDCARD_defconfig
  8. 3
      configs/P1020MBG-PC_defconfig
  9. 6
      include/configs/p1_p2_rdb_pc.h
  10. 1
      scripts/config_whitelist.txt

@ -116,6 +116,11 @@ config TARGET_P1023RDB
bool "Support P1023RDB"
select ARCH_P1023
config TARGET_P1020MBG
bool "Support P1020MBG-PC"
select SUPPORT_SPL
select SUPPORT_TPL
config TARGET_P1_P2_RDB_PC
bool "Support p1_p2_rdb_pc"
select SUPPORT_SPL

@ -1,4 +1,5 @@
if TARGET_P1_P2_RDB_PC
if TARGET_P1_P2_RDB_PC || \
TARGET_P1020MBG
config SYS_BOARD
default "p1_p2_rdb_pc"

@ -78,7 +78,7 @@ dimm_params_t ddr_raw_timing = {
.refresh_rate_ps = 7800000,
.tfaw_ps = 30000,
};
#elif (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
#elif (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_P1020RDB_PD))
/* Micron MT41J512M8_187E */
dimm_params_t ddr_raw_timing = {
.n_ranks = 2,

@ -85,13 +85,13 @@ struct fsl_e_tlb_entry tlb_table[] = {
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 8, BOOKE_PAGESZ_1G, 1),
#if defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD)
#if defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_P1020RDB_PD)
/* 2G DDR on P1020MBG, map the second 1G */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 9, BOOKE_PAGESZ_1G, 1),
#endif /* P1020MBG */
#endif /* TARGET_P1020MBG */
#endif /* RAMBOOT/SPL */
#ifdef CONFIG_SYS_INIT_L2_ADDR

@ -6,13 +6,13 @@ CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_TARGET_P1020MBG=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD"
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y

@ -1,12 +1,11 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_TARGET_P1020MBG=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG"
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y

@ -6,12 +6,12 @@ CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_TARGET_P1020MBG=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD"
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y

@ -1,11 +1,10 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_TARGET_P1020MBG=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1020MBG"
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y

@ -10,7 +10,7 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#if defined(CONFIG_P1020MBG)
#if defined(CONFIG_TARGET_P1020MBG)
#define CONFIG_BOARDNAME "P1020MBG-PC"
#define CONFIG_P1020
#define CONFIG_VSC7385_ENET
@ -336,7 +336,7 @@
#define SPD_EEPROM_ADDRESS 0x52
#undef CONFIG_FSL_DDR_INTERACTIVE
#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
#if (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_P1020RDB_PD))
#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
#else
@ -406,7 +406,7 @@
/*
* Local Bus Definitions
*/
#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
#if (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_P1020RDB_PD))
#define CONFIG_SYS_MAX_FLASH_SECT 512 /* 64M */
#define CONFIG_SYS_FLASH_BASE 0xec000000
#elif defined(CONFIG_P1020UTM)

@ -3384,7 +3384,6 @@ CONFIG_OS_ENV_ADDR
CONFIG_OTHBOOTARGS
CONFIG_OVERWRITE_ETHADDR_ONCE
CONFIG_P1020
CONFIG_P1020MBG
CONFIG_P1020RDB_PC
CONFIG_P1020RDB_PD
CONFIG_P1020UTM

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