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mpc83xx: Fix the align bug of SDMA buffer

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According to the latest user manual, the SDMA temporary
buffer base address must be 4KB aligned.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
master
Dave Liu 18 years ago committed by Kim Phillips
parent 66dc2c2dc5
commit ff9658d704
2 changed files with 2 additions and 2 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 2
      drivers/qe/qe.c
  2. 2
      drivers/qe/qe.h

2
drivers/qe/qe.c
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@ -98,7 +98,7 @@ static void qe_sdma_init(void)
out_be32(&p->sdaqmr, 0);
/* Allocate 2KB temporary buffer for sdma */
sdma_buffer_base = qe_muram_alloc(2048, 64);
sdma_buffer_base = qe_muram_alloc(2048, 4096);
out_be32(&p->sdwbcr, sdma_buffer_base & QE_SDEBCR_BA_MASK);
/* Clear sdma status */

2
drivers/qe/qe.h
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@ -29,7 +29,7 @@
#define QE_NUM_OF_BRGS 16
#define UCC_MAX_NUM 8
#define QE_DATAONLY_BASE (uint)(128)
#define QE_DATAONLY_BASE 0
#define QE_DATAONLY_SIZE (QE_MURAM_SIZE - QE_DATAONLY_BASE)
/* QE threads SNUM

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