Merge branch 'master' of git://git.denx.de/u-boot-usb

Modified:
	configs/ls1012afrdm_qspi_defconfig
	configs/ls1012aqds_qspi_defconfig
	configs/ls1012ardb_qspi_defconfig
	include/configs/ls1012afrdm.h
	include/configs/ls1012aqds.h
	include/configs/ls1012ardb.h

Signed-off-by: Tom Rini <trini@konsulko.com>
master
Tom Rini 9 years ago
commit ffd859979e
  1. 2
      common/usb.c
  2. 2
      configs/am437x_hs_evm_defconfig
  3. 2
      configs/am43xx_evm_defconfig
  4. 2
      configs/am43xx_evm_ethboot_defconfig
  5. 2
      configs/am43xx_evm_qspiboot_defconfig
  6. 2
      configs/am43xx_evm_usbhost_boot_defconfig
  7. 3
      configs/am57xx_evm_defconfig
  8. 3
      configs/am57xx_evm_nodt_defconfig
  9. 3
      configs/am57xx_hs_evm_defconfig
  10. 1
      configs/bf526-ezbrd_defconfig
  11. 1
      configs/bf527-ezkit-v2_defconfig
  12. 1
      configs/bf527-ezkit_defconfig
  13. 1
      configs/bf548-ezkit_defconfig
  14. 3
      configs/cm_t43_defconfig
  15. 2
      configs/dra72_hs_evm_defconfig
  16. 2
      configs/dra74_hs_evm_defconfig
  17. 2
      configs/dra7xx_evm_defconfig
  18. 3
      configs/k2e_evm_defconfig
  19. 3
      configs/k2g_evm_defconfig
  20. 3
      configs/k2hk_evm_defconfig
  21. 3
      configs/k2l_evm_defconfig
  22. 3
      configs/ls1012afrdm_qspi_defconfig
  23. 3
      configs/ls1012aqds_qspi_defconfig
  24. 3
      configs/ls1012ardb_qspi_defconfig
  25. 3
      configs/ls1021aqds_ddr4_nor_defconfig
  26. 3
      configs/ls1021aqds_ddr4_nor_lpuart_defconfig
  27. 3
      configs/ls1021aqds_nand_defconfig
  28. 3
      configs/ls1021aqds_nor_SECURE_BOOT_defconfig
  29. 3
      configs/ls1021aqds_nor_defconfig
  30. 3
      configs/ls1021aqds_nor_lpuart_defconfig
  31. 3
      configs/ls1021aqds_qspi_defconfig
  32. 3
      configs/ls1021aqds_sdcard_ifc_defconfig
  33. 3
      configs/ls1021aqds_sdcard_qspi_defconfig
  34. 3
      configs/ls1021atwr_nor_SECURE_BOOT_defconfig
  35. 3
      configs/ls1021atwr_nor_defconfig
  36. 3
      configs/ls1021atwr_nor_lpuart_defconfig
  37. 3
      configs/ls1021atwr_qspi_defconfig
  38. 3
      configs/ls1021atwr_sdcard_ifc_defconfig
  39. 3
      configs/ls1021atwr_sdcard_qspi_defconfig
  40. 3
      configs/ls1043aqds_defconfig
  41. 3
      configs/ls1043aqds_lpuart_defconfig
  42. 3
      configs/ls1043aqds_nand_defconfig
  43. 3
      configs/ls1043aqds_nor_ddr3_defconfig
  44. 3
      configs/ls1043aqds_qspi_defconfig
  45. 3
      configs/ls1043aqds_sdcard_ifc_defconfig
  46. 3
      configs/ls1043aqds_sdcard_qspi_defconfig
  47. 3
      configs/ls1043ardb_SECURE_BOOT_defconfig
  48. 3
      configs/ls1043ardb_defconfig
  49. 3
      configs/ls1043ardb_nand_defconfig
  50. 3
      configs/ls1043ardb_sdcard_defconfig
  51. 3
      configs/ls2080aqds_SECURE_BOOT_defconfig
  52. 3
      configs/ls2080aqds_defconfig
  53. 3
      configs/ls2080aqds_nand_defconfig
  54. 3
      configs/ls2080ardb_SECURE_BOOT_defconfig
  55. 3
      configs/ls2080ardb_defconfig
  56. 3
      configs/ls2080ardb_nand_defconfig
  57. 2
      configs/odroid-xu3_defconfig
  58. 2
      configs/peach-pi_defconfig
  59. 2
      configs/peach-pit_defconfig
  60. 2
      configs/smdk5420_defconfig
  61. 2
      configs/xilinx_zynqmp_ep_defconfig
  62. 2
      configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
  63. 2
      configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
  64. 2
      configs/xilinx_zynqmp_zcu102_defconfig
  65. 2
      configs/xilinx_zynqmp_zcu102_revB_defconfig
  66. 12
      drivers/usb/host/Kconfig
  67. 2
      drivers/usb/host/Makefile
  68. 2
      include/configs/am43xx_evm.h
  69. 2
      include/configs/am57xx_evm.h
  70. 1
      include/configs/bf526-ezbrd.h
  71. 1
      include/configs/bf527-ezkit.h
  72. 1
      include/configs/bf548-ezkit.h
  73. 2
      include/configs/cm_t43.h
  74. 2
      include/configs/dra7xx_evm.h
  75. 3
      include/configs/ds414.h
  76. 1
      include/configs/exynos5-common.h
  77. 1
      include/configs/exynos5420-common.h
  78. 2
      include/configs/ls1012afrdm.h
  79. 2
      include/configs/ls1012aqds.h
  80. 2
      include/configs/ls1012ardb.h
  81. 2
      include/configs/ls1021aqds.h
  82. 2
      include/configs/ls1021atwr.h
  83. 2
      include/configs/ls1043aqds.h
  84. 2
      include/configs/ls1043ardb.h
  85. 2
      include/configs/ls2080aqds.h
  86. 2
      include/configs/ls2080ardb.h
  87. 1
      include/configs/smdk5420.h
  88. 2
      include/configs/ti_armv7_keystone2.h
  89. 2
      include/configs/xilinx_zynqmp.h
  90. 2
      include/dwc3-uboot.h

@ -1182,7 +1182,7 @@ int usb_new_device(struct usb_device *dev)
* with the device. So a get_descriptor will fail before any
* of that is done for XHCI unlike EHCI.
*/
#ifdef CONFIG_USB_XHCI
#ifdef CONFIG_USB_XHCI_HCD
do_read = false;
#endif
err = usb_setup_device(dev, do_read, dev->parent);

@ -42,6 +42,8 @@ CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y

@ -42,6 +42,8 @@ CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y

@ -29,6 +29,8 @@ CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y

@ -29,6 +29,8 @@ CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y

@ -40,6 +40,8 @@ CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y

@ -33,3 +33,6 @@ CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -22,4 +22,7 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_OF_LIBFDT=y

@ -34,3 +34,6 @@ CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -17,3 +17,4 @@ CONFIG_CMD_FAT=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_USB=y

@ -17,4 +17,5 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_USB=y
CONFIG_LIB_RAND=y

@ -17,3 +17,4 @@ CONFIG_NET_RANDOM_ETHADDR=y
# CONFIG_NET_TFTP_VARS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_USB=y

@ -16,5 +16,6 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_USB=y
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y
CONFIG_LIB_RAND=y

@ -37,4 +37,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_OF_LIBFDT=y

@ -44,6 +44,8 @@ CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y

@ -43,6 +43,8 @@ CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y

@ -42,6 +42,8 @@ CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y

@ -32,3 +32,6 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_ETH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -32,3 +32,6 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_ETH=y
CONFIG_REMOTEPROC_TI_POWER=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -32,3 +32,6 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_ETH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -32,3 +32,6 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_ETH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -27,3 +27,6 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -30,3 +30,6 @@ CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -30,3 +30,6 @@ CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -27,3 +27,6 @@ CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -27,3 +27,6 @@ CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_FSL_LPUART=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -21,6 +21,9 @@ CONFIG_CMD_FAT=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_OF_LIBFDT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y

@ -22,6 +22,9 @@ CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_OF_LIBFDT=y
CONFIG_FIT=y

@ -26,3 +26,6 @@ CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -27,3 +27,6 @@ CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_FSL_LPUART=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -33,3 +33,6 @@ CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -25,3 +25,6 @@ CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -32,3 +32,6 @@ CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -22,6 +22,9 @@ CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_OF_LIBFDT=y
CONFIG_FIT=y

@ -26,3 +26,6 @@ CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -27,3 +27,6 @@ CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_FSL_LPUART=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -34,3 +34,6 @@ CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -20,6 +20,9 @@ CONFIG_CMD_FAT=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_OF_LIBFDT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y

@ -34,3 +34,6 @@ CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -25,3 +25,6 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -26,3 +26,6 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_FSL_LPUART=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -26,3 +26,6 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -24,3 +24,6 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -26,3 +26,6 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -26,3 +26,6 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -27,3 +27,6 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -21,4 +21,7 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y

@ -21,3 +21,6 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -22,3 +22,6 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -22,3 +22,6 @@ CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

@ -29,5 +29,8 @@ CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

@ -29,4 +29,7 @@ CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

@ -22,5 +22,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_OF_LIBFDT=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

@ -29,5 +29,8 @@ CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

@ -29,4 +29,7 @@ CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

@ -22,5 +22,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_OF_LIBFDT=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

@ -36,6 +36,8 @@ CONFIG_PMIC_S2MPS11=y
CONFIG_DM_REGULATOR=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_PHY_SAMSUNG=y

@ -55,6 +55,8 @@ CONFIG_EXYNOS_SPI=y
CONFIG_TPM_TIS_INFINEON=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
CONFIG_TPM=y

@ -55,6 +55,8 @@ CONFIG_EXYNOS_SPI=y
CONFIG_TPM_TIS_INFINEON=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
CONFIG_TPM=y

@ -36,4 +36,6 @@ CONFIG_DM_REGULATOR=y
CONFIG_EXYNOS_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_VIDEO_BRIDGE=y

@ -58,6 +58,8 @@ CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=25000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_GADGET=y

@ -51,6 +51,8 @@ CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y

@ -49,6 +49,8 @@ CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y

@ -49,6 +49,8 @@ CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y

@ -49,6 +49,8 @@ CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y

@ -9,12 +9,6 @@ config USB_XHCI_HCD
The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
"SuperSpeed" host controller hardware.
config USB_XHCI
bool
default USB_XHCI_HCD
---help---
TODO: rename after most boards switch to Kconfig
if USB_XHCI_HCD
config USB_XHCI_UNIPHIER
@ -24,6 +18,12 @@ config USB_XHCI_UNIPHIER
---help---
Enables support for the on-chip xHCI controller on UniPhier SoCs.
config USB_XHCI_DWC3
bool "DesignWare USB3 DRD Core Support"
help
Say Y or if your system has a Dual Role SuperSpeed
USB controller based on the DesignWare USB3 IP Core.
endif
config USB_OHCI_GENERIC

@ -54,7 +54,7 @@ obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
# xhci
obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o
obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o

@ -99,8 +99,6 @@
#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
#define CONFIG_USB_HOST
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_USB_STORAGE
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

@ -64,8 +64,6 @@
/* USB xHCI HOST */
#define CONFIG_USB_HOST
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_USB_STORAGE
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

@ -125,7 +125,6 @@
* USB Settings
*/
#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__)
#define CONFIG_USB
#define CONFIG_USB_MUSB_HCD
#define CONFIG_USB_BLACKFIN
#define CONFIG_USB_STORAGE

@ -128,7 +128,6 @@
* USB Settings
*/
#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__)
#define CONFIG_USB
#define CONFIG_USB_MUSB_HCD
#define CONFIG_USB_BLACKFIN
#define CONFIG_USB_STORAGE

@ -151,7 +151,6 @@
* USB Settings
*/
#if !defined(__ADSPBF544__)
#define CONFIG_USB
#define CONFIG_USB_MUSB_HCD
#define CONFIG_USB_BLACKFIN
#define CONFIG_USB_STORAGE

@ -61,9 +61,7 @@
/* USB support */
#define CONFIG_USB_HOST
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_STORAGE
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY

@ -211,8 +211,6 @@
/* USB xHCI HOST */
#define CONFIG_USB_HOST
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_USB_STORAGE
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

@ -71,12 +71,11 @@
* - USB init fails, controller does not respond in time */
#if 0
#undef CONFIG_DM_USB
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_PCI
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#if !defined(CONFIG_USB_XHCI)
#if !defined(CONFIG_USB_XHCI_HCD)
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MARVELL
#define CONFIG_EHCI_IS_TDI

@ -157,7 +157,6 @@
/* USB */
#define CONFIG_USB_STORAGE
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

@ -48,7 +48,6 @@
*/
#define CONFIG_CORE_COUNT 0x8
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS
#endif /* __CONFIG_EXYNOS5420_H */

@ -28,9 +28,7 @@
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE

@ -124,9 +124,7 @@
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE

@ -29,9 +29,7 @@
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE

@ -450,8 +450,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif

@ -57,8 +57,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif

@ -388,9 +388,7 @@ unsigned long get_board_ddr_clk(void);
/* USB */
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE

@ -278,9 +278,7 @@
/* USB */
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE

@ -383,9 +383,7 @@ unsigned long get_board_ddr_clk(void);
* USB
*/
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE

@ -316,9 +316,7 @@ unsigned long get_board_sys_clk(void);
* USB
*/
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE

@ -31,7 +31,6 @@
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
/* USB */
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS
/* DRAM Memory Banks */

@ -191,8 +191,6 @@
"-(ubifs)"
/* USB Configuration */
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI_KEYSTONE
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE

@ -115,8 +115,6 @@
#define CONFIG_SYS_LOAD_ADDR 0x8000000
#if defined(CONFIG_ZYNQMP_USB)
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE

@ -13,7 +13,7 @@
#include <linux/usb/otg.h>
struct dwc3_device {
int base;
unsigned long base;
enum usb_dr_mode dr_mode;
u32 maximum_speed;
unsigned tx_fifo_resize:1;

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