The outx/writex macros were using writex(addr, val) rather than
the standard writex(val, addr), resulting in incompatibilty with
architecture independent components. This change set uses standard
parameter order.
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
The standard Altera UART & JTAG UART as well as the OpenCores
YANU driver are now in individual files in drivers/serial
rather than a single file uner cpu/nios2.
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Add support for the Xilinx ML300 platform
* Patch by Stephan Linz, 17 Feb 2004:
Fix watchdog support for NIOS
* Patch by Josh Fryman, 16 Feb 2004:
Fix byte-swapping for cfi_flash.c for different bus widths
* Patch by Jon Diekema, 14 Jeb 2004:
Remove duplicate "FPGA Support" notes from the README file
- add support for Altera Nios-32 CPU
- add support for Nios Cyclone Development Kit (DK-1C20)
* Patch by Steven Scholz, 29 Sep 2003:
- A second parameter for bootm overwrites the load address for
"Standalone Application" images.
- bootm sets environment variable "filesize" to the resulting
(uncompressed) data length for "Standalone Application" images
when autostart is set to "no". Now you can do something like
if bootm $fpgadata $some_free_ram ; then
fpga load 0 $some_free_ram $filesize
fi
* Patch by Denis Peter, 25 Sept 2003:
add support for the MIP405 Rev. C board