3 Commits (50ca95402876cf7bac4e2d4f7855f616a038763f)

Author	SHA1	Message	Date
Haiying Wang	c21617fd26	Add DDR options setting on MPC8641HPCN board ... * Add board specific parameter table to choose correct cpo, clk_adjust, write_data_delay based on board ddr frequency and n_ranks. * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>	16 years ago
Haiying Wang	dfb49108e4	Pass dimm parameters to populate populate controller options ... Because some dimm parameters like n_ranks needs to be used with the board frequency to choose the board parameters like clk_adjust etc. in the board_specific_paramesters table of the board ddr file, we need to pass the dimm parameters to the board file. * move ddr dimm parameters header file from /cpu to /include directory. * add ddr dimm parameters to populate board specific options. * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>	16 years ago
Kumar Gala	6a8e569293	FSL DDR: Convert MPC8641HPCN to new DDR code. ... Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>	16 years ago