AMD recently changed the licensing of the RAM sizing code to the
GPLv2 (or at your option any later version)
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
If the board has a high precision mico-second timer, it maked sense to use
it instead of the on-chip one
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
This patch allows the low-level assembler boot-strap to obtain the RAM
size without calling the destructive 'sizer' routine. This allows
boot-strapping from a U-Boot image loaded in RAM
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
There is an error in how the assembler version of the sc520 memory size
reporting code works. As a result, it will only ever report at most the
size of one bank of RAM
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Graeme Russ
Peter Tyser