Move GD_BIST from lib/asm-offsets.c to arch/x86/lib/asm-offsets.c
as it is x86 arch specific stuff. Also remove GENERATED_GD_RELOC_OFF
which is not referenced anymore.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
On x86 machines we can use an emulator to run option ROMS as with other
architectures. But with some additional effort (mostly due to the 16-bit
nature of option ROMs) we can run them natively. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rename interrupt_init() in arch/x86/lib/pcat_interrupts.c to
i8259_init() and create a new interrupt_init() in
arch/x86/cpu/interrupt.c to call i8259_init() followed by a
call to cpu_init_interrupts().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Currently cpu_init_interrupts() is called from cpu_init_r() to
setup the interrupt and exception of the cpu core, but at that
time the i8259 has not been initialized to mask all the irqs
and remap the master i8259 interrupt vector base, so the whole
system is at risk of being interrupted, and if interrupted,
wrong interrupt/exception message is shown.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
This normally indicates a problem which will prevent relocation from
functioning, resulting in a hang. Panic in this case to make it easier
to debug.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in
the board directory and the SDRAM SPD information in the device tree. This
also needs the Intel Management Engine (me.bin) to work. Binary blobs
everywhere: so far we have MRC, ME and microcode.
SDRAM init works by setting up various parameters and calling the MRC. This
in turn does some sort of magic to work out how much memory there is and
the timing parameters to use. It also sets up the DRAM controllers. When
the MRC returns, we use the information it provides to map out the
available memory in U-Boot.
U-Boot normally moves itself to the top of RAM. On x86 the RAM is not
generally contiguous, and anyway some RAM may be above 4GB which doesn't
work in 32-bit mode. So we relocate to the top of the largest block of
RAM we can find below 4GB. Memory above 4GB is accessible with special
functions (see physmem).
It would be possible to build U-Boot in 64-bit mode but this wouldn't
necessarily provide any more memory, since the largest block is often below
4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large
ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit
kernels directly so this does not pose a limitation in that area. Also there
are probably parts of U-Boot that will not work correctly in 64-bit mode.
The MRC is one.
There is some work remaining in this area. Since memory init is very slow
(over 500ms) it is possible to save the parameters in SPI flash to speed it
up next time. Suspend/resume support is not fully implemented, or at least
it is not efficient.
With this patch, link boots to a prompt.
Signed-off-by: Simon Glass <sjg@chromium.org>
Unfortunately MSR_FSB_FREQ is not available on this CPU, and the PIT method
seems to take up to 50ms which is much too long.
For this CPU we know the frequency, so add another special case for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Return the saved TSC frequency in get_tbclk_mhz().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Use the same way that Linux does for quick TSC calibration via PIT
when calibration via MSR fails.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Using MSR_PLATFORM_INFO (0xCE) to calibrate TSR will cause #GP on
processors which do not have this MSR. Instead only doing the MSR
calibration for known/supported CPUs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
The boot_zimage() function is badly named it can also boot a raw kernel.
Rename it, and try to avoid pointers for memory addresses as it involves
lots of casting.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code generates warnings with recent gcc versions. We really don't need
the clobber specification, so just drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
The motivation of this commit is to change CONFIG_USE_PRIVATE_LIBGCC
to a boolean macro so we can move it to Kconfig.
In the current implementation, there are two forms of syntax
for this macro:
- CONFIG_USE_PRIVATE_LIBGCC=y
- CONFIG_USE_PRIVATE_LIBGCC=path/to/private/libgcc
The latter is only used by x86 architecture.
With a little bit refactoring, it can be converted to the former.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
The x86 bootm code is quite special, and geared to zimage. Adjust it
to support device tree and make it more like the ARM code, with
separate bootm stages and functions for each stage.
Create a function announce_and_cleanup() to handle printing the
"Starting kernel ..." message and put it in bootm so it is in one
place and can be used by any loading code. Also move the
board_final_cleanup() function into bootm.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present stdio device functions do not get any clue as to which stdio
device is being acted on. Some implementations go to great lengths to work
around this, such as defining a whole separate set of functions for each
possible device.
For driver model we need to associate a stdio_dev with a device. It doesn't
seem possible to continue with this work-around approach.
Instead, add a stdio_dev pointer to each of the stdio member functions.
Note: The serial drivers have the same problem, but it is not strictly
necessary to fix that to get driver model running. Also, if we convert
serial over to driver model the problem will go away.
Code size increases by 244 bytes for Thumb2 and 428 for PowerPC.
22: stdio: Pass device pointer to stdio methods
arm: (for 2/2 boards) all +244.0 bss -4.0 text +248.0
powerpc: (for 1/1 boards) all +428.0 text +428.0
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
There is no point in setting a structure's memory to NULL when it has
already been zeroed with memset().
Also, there is no need to create a stub function for stdio to call - if the
function is NULL it will not be called.
This is a clean-up, with no change in functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
U-Boot has supported two kinds of asm-offsets.h.
One is generic for all architectures and its source is located at
./lib/asm-offsets.c.
The other is SoC specific and its source is under SoC directory.
The problem here is that only boards with SoC directory can use
the asm-offsets infrastructure.
Putting asm-offsets.c right under CPU directory does not work.
Now a new demand is coming. PowerPC folks want to use asm-offsets.
But no PowerPC boards have SoC directory.
It seems inconsistent that some boards add asm-offsets.c to SoC
directoreis and some to CPU directories.
It looks more reasonable to put asm-offsets.c under arch/$(ARCH)/lib.
This commit merges asm-offsets.c under SoC directories into
arch/$(ARCH)/lib/asm-offsets.c.
By the way, I doubt the necessity of some entries in asm-offsets.c.
I am leaving refactoring to the board maintainers.
Please check "TODO" in the comment blocks in
arch/{arm,nds32}/lib/asm-offsets.c.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Yuantian Tang <Yuantian.Tang@freescale.com>
Useful rules in scripts/Makefile.lib allows us to easily
generate a device tree blob and wrap it in assembly code.
We do not need to parse a linker script to get output format and arch.
This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This commit changes the working directory
where the build process occurs.
Before this commit, build process occurred under the source
tree for both in-tree and out-of-tree build.
That's why we needed to add $(obj) prefix to all generated
files in makefiles like follows:
$(obj)u-boot.bin: $(obj)u-boot
Here, $(obj) is empty for in-tree build, whereas it points
to the output directory for out-of-tree build.
And our old build system changes the current working directory
with "make -C <sub-dir>" syntax when descending into the
sub-directories.
On the other hand, Kbuild uses a different idea
to handle out-of-tree build and directory descending.
The build process of Kbuild always occurs under the output tree.
When "O=dir/to/store/output/files" is given, the build system
changes the current working directory to that directory and
restarts the make.
Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=<sub-dir>"
syntax for descending into sub-directories.
(We can write it like "make $(obj)=<sub-dir>" with a shorthand.)
This means the current working directory is always the top
of the output directory.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
MAKEALL is fine for ppc4xx and mpc85xx.
Run checks were done on our controlcenterd hardware.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The OS function is now always called with the PREP stage. Adjust the
remaining bootm OS functions to deal with this correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some changes are needed to x86 timer functions to support tracing. Add
these so that the feature works correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is no longer used since we prefer the more accurate TSC timer, so
remove the dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.
Tidy up some old broken and unneeded implementations at the same time.
To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base timestamp supplied by coreboot
as U-Boot's base time.
Signed-off-by: Simon Glass <sjg@chromium.org>base
Signed-off-by: Simon Glass <sjg@chromium.org>
The 'Starting linux' message appears twice in the code, but both call
through the same place. Unify these and add calls to bootstage to
mark the occasion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Spang <spang@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
Several files use the global_data pointer without declaring it. This works
because the declaration is currently a NOP. But still it is better to
fix this so that x86 lines up with other archs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
Graeme Russ pointed out that this code is no longer used. Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
Delete all occurrences of hang() and provide a generic function.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
[trini: Modify check around puts() in hang.c slightly]
Signed-off-by: Tom Rini <trini@ti.com>
It is possible that our PCI bus will provide the SPI controller, so change
the init order to make this work.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file handles common pre-relocation init for boards which use
the generic framework.
It starts up the console, DRAM, performs relocation and then jumps
to post-relocation init.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
This does not actually change normal behaviour, but adds a check that
should detect corruption of relocation data (e.g. by using BSS data
prior to relocation).
Also add additional debugging output when enabled.
During this investigation, two situations have been seen:
1. calculate_relocation_address():
uintptr_t size = (uintptr_t)&__bss_end - (uintptr_t)&__text_start;
turns into
111166f: b8 83 c4 17 01 mov $0x117c483,%eax
whih is beyond the end of bss:
0117b484 g .bss 00000000 __bss_end
Somehow the __bss_end here is 255 bytes ahead.
2. do_elf_reloc_fixups():
uintptr_t size = (uintptr_t)&__bss_end - (uintptr_t)&__text_start;
Here the __text_start is 0 in the file:
1111d9f: bb a0 e0 13 01 mov $0x113e0a0,%ebx
1111da4: 81 ef 00 00 00 00 sub $0x0,%edi
As it happens, both of these are in pre-relocation code.
For these reasons we silent check and ignore bad relocations.
Signed-off-by: Simon Glass <sjg@chromium.org>
With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate
it up with the rest of U-Boot to keep the rest of memory free.
Signed-off-by: Simon Glass <sjg@chromium.org>
With this symbol we can easy append something (e.g. an FDT) to the U-Boot
binary and access it from within U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bin Meng
Masahiro Yamada
Simon Glass
Wolfgang Denk
Dirk Eibach
Andreas Bießmann