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4 Commits (7f0cfe478bd817d2bb373522222cf06630fea3cd)

Author	SHA1	Message	Date
Vikas Manocha	58fb3c8d89	stm32f7: increase the max no of pin configuration to 70 ... The number of pins to be configured could be more than 50 e.g. in case of sdram controller, there are about 56 pins (32 data lines, 12 address & some control signals). Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>	8 years ago
Vikas Manocha	280057bd7d	stm32f7: use stm32f7 gpio driver supporting driver model ... With this gpio driver supporting DM, there is no need to enable clocks for different gpios (for pin muxing) in the board specific code. Need to increase the allocatable area required before relocation from 0x400 to 0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>	8 years ago
Vikas Manocha	774171020b	dm: gpio: Add driver for stm32f7 gpio controller ... This patch adds gpio driver supporting driver model for stm32f7 gpio. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Christophe KERELLO <christophe.kerello@st.com> [trini: Add depends on STM32] Signed-off-by: Tom Rini <trini@konsulko.com>	8 years ago
Vikas Manocha	94d5308412	PINCTRL: stm32f7: add pin control driver ... This driver uses the same pin control binding as that of linux, binding document of this patch is copied from linux. One addition done is for GPIO input and output mode configuration which was missing. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>	8 years ago