u-boot

Commit Graph

Author	SHA1	Message	Date
Tom Warren	d94c2dbd0a	Tegra: Fix MSELECT clock divisors for T30/T114. A comparison of registers between our internal NV U-Boot and u-boot-tegra/next showed some discrepancies in the MSELECT clock divisor programming. T20 doesn't have a MSELECT clk src reg. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>	12 years ago
Tom Warren	1b245fee91	Tegra30: Add AVP (arm720t) files This provides SPL support for T30 boards - AVP early init, plus CPU (A9) init/jump to main U-Boot. Some changes were made to Tegra20 cpu.c to move common routines into tegra-common/cpu.c and reduce code duplication. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>	13 years ago

Author

SHA1

Message

Date

Tom Warren

d94c2dbd0a

Tegra: Fix MSELECT clock divisors for T30/T114.

A comparison of registers between our internal NV U-Boot and
u-boot-tegra/next showed some discrepancies in the MSELECT
clock divisor programming. T20 doesn't have a MSELECT clk src reg.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

12 years ago

Tom Warren

1b245fee91

Tegra30: Add AVP (arm720t) files

This provides SPL support for T30 boards - AVP early init, plus
CPU (A9) init/jump to main U-Boot.

Some changes were made to Tegra20 cpu.c to move common routines
into tegra-common/cpu.c and reduce code duplication.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>

13 years ago

2 Commits (8b6b51a617b8adc773cc82b4886738a6128caf7f)