u-boot

Commit Graph

Author	SHA1	Message	Date
Sonic Zhang	ab784696fc	blackfin: The logic of the BF609 macro is opposite. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>	12 years ago
Sonic Zhang	a2979dcdbe	blackfin: bf60x: Port blackfin core architecture code to boot on bf60x. Set up clocks, DDR controller, Nor flash controller, reboot, serial port. Add new SPI boot modes. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>	13 years ago
Mike Frysinger	4150cec335	Blackfin: split out async setup We really only need to tweak the async banks in the initcode if the processor is booting out of it, otherwise we can wait until later on in the CPU booting setup. This also makes testing in the sim and early bring up over JTAG work much smoother when the initcode gets bypassed. Signed-off-by: Mike Frysinger <vapier@gentoo.org>	14 years ago

Author

SHA1

Message

Date

Sonic Zhang

ab784696fc

blackfin: The logic of the BF609 macro is opposite.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>

12 years ago

Sonic Zhang

a2979dcdbe

blackfin: bf60x: Port blackfin core architecture code to boot on bf60x.

Set up clocks, DDR controller, Nor flash controller, reboot,
serial port. Add new SPI boot modes.

Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>

13 years ago

Mike Frysinger

4150cec335

Blackfin: split out async setup

We really only need to tweak the async banks in the initcode if the
processor is booting out of it, otherwise we can wait until later
on in the CPU booting setup.

This also makes testing in the sim and early bring up over JTAG work
much smoother when the initcode gets bypassed.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

14 years ago

3 Commits (927b901b47a60a10dc802b343a8bfb8dd4d5c457)