This driver is designed in a generic manner, so clocks should be
handled genericly as well.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Use existing library function to poll bit(s).
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
Add a compatible string to allow this to be specified in the device tree
if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
USB protocol allows for 16 IN and 16 OUT endpoints (USB 2.0 Spec,
8.3.2.2 Endpoint Field). A function may have an EP 1 for both IN and OUT,
so these two should be kept separate. As EPs are either BULK or INTERRUPT
(or ISO), it is fine to have one array per direction for all transfer
types (also see e236519b73).
USB device address is 7 bits, so a bus may have more than 16 devices.
Check the device number, as the DWC2 driver only supports BULK/ISO for
the first 16 devices.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
CSPLITs for INTERRUPT transactions have to be scheduled in each microframe
following the SSPLIT. INTERRUPT transfers are executed in the next even/
odd microframe depending on the HCCHAR_ODDFRM flag.
As there are no handshakes for INTERRUPT SSPLITs the SSPLIT may have
failed (transport error) without the error being detected by the host
driver. If the last CSPLIT is not received within 4 microframes after the
SSPLIT there was a transaction error and the complete transaction has
to be restarted.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
In contrast to non-SPLIT transfers each transaction has to be submitted
as an individual chunk.
The transaction state machine proceeds from SSPLIT to CSPLIT if the ACK
flag is set. CSPLIT has to be repeated while NYET is set.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
The split register setting is used for both SSPLIT and CSPLIT transactions,
the bit for CSPLIT has to be set seperately.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Split the movement of data between CPU and Host Controller from the
status handling and tracking of transfer progress.
This will also simplify adding of SPLIT transaction support.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
A transfer is completed if the XFERCOMP flag is set, irrespective of the
ACK flag. BULK OUT transfers to some HS devices complete without having
the ACK flag set, which signal the devices has responded with an NYET
to the transfer (PING protocol).
The new behaviour matches the Linux kernel minus any PING protocol.
Also see 5966defabdcc (usb: dwc2: fix bulk transfers)
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Fix two errors in transfer len calculation, move loop invariant code out
of loop.
If xfer_len is equal to CONFIG_DWC2_MAX_TRANSFER_SIZE (or slightly
smaller), the xfer_len will be to large, e.g.:
xfer_len = MAX_TRANSFER_SIZE = 65535
max packet size = 512
=> num_packets = 128
=> IN xfer_len = 65536
For OUT transactions larger than (65536 - mps) bytes, the xfer_len
determination is quite awkward, it is only correct due to:
- max_packet_size for control/bulk/interrupt is required to be
power-of-two.
- (CONFIG_DWC2_MAX_TRANSFER_SIZE + 1) % max-packet-size is zero
for all allowed (2^3 ... 2^9) packet sizes
As the max xfer len is loop invariant, it can be moved out of the loop.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Add board_usb_phy_mode weak function on similar lines to ehci-mx6.
However since Vybrid USB does not have a true OTG, make this weak
functon just return 0. The function is supposed to be implemented
by the individual boards using a GPIO for providing the OTG pin
functionality.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
The current ehci-vf USB driver for Vybrid hardcodes the USB host
and client functionality. Remove this.
Reported-by: Santhosh Kumar Janardhanam <santhosh.kj@hcl.com>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Convert this driver to use the new driver model PCI API.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.
For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_get_bdf() accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Start split and complete split tokens need the hub address and the
downstream port of the first HS hub (device view).
The core of the function was duplicated in both host/ehci_hcd and
musb-new/usb-compat.h.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
flush_dcache_range may access data after priv->aligned_buffer end if
len > DWC2_DATA_BUF_SIZE.
memcpy may access data after buffer end if done > 0
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
This driver is meant to be used with any OHCI-compatible host
controller in case if there's no need for platform-specific
glue such as setup of controller or PHY's power mode via
GPIOs etc.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
With the old order of initialization the hcor pointer has been setup to
the same address as Exynos EHCI base address (0x12110000 instead of
0x12110010).
Such behaviour was caused by reading value of 0 instead of 0x10 from EHCI
HCCPBASE register without doing proper clock initialization before.
To fix this problem hcor initialization has been moved after USB PHY setup.
Now ehci_readl(&ctx->hcd->cr_capbase) returns correct value.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
This patch removes unsued function usb_phy_reset, rather common function
dwc3_phy_reset is used.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
As per dwc3 databook, delay is required before taking the core out of reset.
This delay is required so that the PHY are stable, and then we can take core
out of reset.
Reference is taken from linux dwc3 code, file: drivers/usb/dwc3/core.c.
Signed-off-by: Sriram Dash <sriram.dash@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
This driver is meant to be used with any EHCI-compatible host
controller in case if there's no need for platform-specific
glue such as setup of controller or PHY's power mode via
GPIOs etc.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
The DM entry should be unique, otherwise it will collide with other
drivers. Fix this by assigning the driver a more unique name than
usb_ehci.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Simon Glass <sjg@chromium.org>
The driver does "return 0" in function with void type.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Fix the following build break:
drivers/usb/host/xhci-omap.c:35:5: error: ‘board_usb_init’ aliased to external symbol ‘__board_usb_init’
int board_usb_init(int index, enum usb_init_type init)
^
Signed-off-by: Felipe Balbi <balbi@ti.com>
Each scan of the USB bus may return different results. Existing driver-model
devices are reused when found, but if a device no longer exists it will stay
around, de-activated, but bound.
Detect these devices and remove them after the scan completes.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function should not be used with driver model. While there are users
of USB Ethernet that use driver model for USB but not Ethernet, we have
to keep it around. Add a comment to that effect.
Signed-off-by: Simon Glass <sjg@chromium.org>
The console includes a global variable and several functions that are only
used by a small subset of U-Boot files. Before adding more functions, move
the definitions into their own header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
We need to cache-flush the hcca area after the initial memset, otherwise
on the first hc_interrupt we might see an old $random value as done_head and
try to interpret that as the address for a completed td (followed by chaos).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The current name is inconsistent with other driver model data access
functions. Rename it and fix up all users.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
This patch adds driver model (DM) support to the Marvell EHCI driver.
This will be used by the MVEBU SoC's, currently Armada XP and 38x.
Tested on Marvell Armada XP and 38x eval boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Now that we have a new header file for cache-aligned allocation, we should
move the stack-based allocation macro there also.
Signed-off-by: Simon Glass <sjg@chromium.org>
When an EHCI device is registered in device mode, the HW isn't actually
initialized at all, and hence isn't left in a running state. Consequently,
when the device is deregistered, ehci_shutdown() will fail, since the HW
bits it expects to see set in response to its shutdown requests will not
be sent, and the message "EHCI failed to shut down host controller." will
be printed.
Fix ehci-hcd.c to remember whether the device was registered in host or
device mode, and only call ehci_shutdown() for host mode registrations.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This is a convenient way for a driver to get the hardware address of a
device, when regmap or syscon are not being used. Change existing callers
to use it as an example to others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
This driver is not used only on exynos, but also on Altera SoCFPGA,
HiSilicon SoCs, RPi etc, so rename it accordingly to prevent confusion.
Signed-off-by: Marek Vasut <marex@denx.de>
xhci omap driver has board_usb_init in xhci_hcd_init but doesn't have
the corresponding cleanup function in xhci_hcd_stop.
Fix it here by invoking board_usb_cleanup() in xhci_hcd_stop().
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
This patch fixes a potential NULL pointer dereference arising on
non-present/non-initialized xHCI controllers and adds some error
handling to xHCI code
Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
USB EHCI on SPEAr600 has not been tested for a while. The base controller
addresses are missing. This patch adds the defines to the header. And adds
the missing code.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Document target board specific functions
board_ehci_hcd_init - override usb phy mode
board_ehci_hcd_init - set usb vbus voltage
board_ehci_power - enables/disables usb vbus voltage
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Incorporate USB driver from legacy LPCLinux NXP BSP.
The files taken from the legacy patch are:
- lpc32xx USB driver
- lpc3250 header file USB registers definition.
The legacy driver was updated and clean-up as part of the integration with the latest u-boot.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Vladimir Zapolskiy <vz@mleia.com>