u-boot

Commit Graph

Author	SHA1	Message	Date
Kever Yang	7805cdf494	rockchip: use common sdram function Replace the sdram_init() in board init and rockchip_sdram_size() in sdram driver for all the Rockchip SoCs which enable CONFIG_RAM. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Make dram_init() in rk3036-board.c conditional on CONFIG_RAM: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>	7 years ago
Heiko Stübner	bd7e6086c5	rockchip: rk3288: sdram: use constants in ddrconf table Use defines to describe the bit shifts used to create the table for ddrconf register values. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>	7 years ago
Simon Glass	5ff093ab9e	rockchip: rk3288: Add SDRAM init Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses device tree for configuration so should be able to support other RAM configurations. It may be possible to generalise the code to support other SoCs at some point. Signed-off-by: Simon Glass <sjg@chromium.org>	9 years ago

Author

SHA1

Message

Date

Kever Yang

7805cdf494

rockchip: use common sdram function

Replace the sdram_init() in board init and rockchip_sdram_size() in
sdram driver for all the Rockchip SoCs which enable CONFIG_RAM.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Make dram_init() in rk3036-board.c conditional on CONFIG_RAM:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

7 years ago

Heiko Stübner

bd7e6086c5

rockchip: rk3288: sdram: use constants in ddrconf table

Use defines to describe the bit shifts used to create the
table for ddrconf register values.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>

7 years ago

Simon Glass

5ff093ab9e

rockchip: rk3288: Add SDRAM init

Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses
device tree for configuration so should be able to support other RAM
configurations. It may be possible to generalise the code to support other
SoCs at some point.

Signed-off-by: Simon Glass <sjg@chromium.org>

9 years ago

3 Commits (df0370bc41c076418eed3e247fe14b4e3ed78d8d)