u-boot

Commit Graph

Author	SHA1	Message	Date
Masahiro Yamada	30088b0997	ARM: socfpga: move SoC headers to mach-socfpga/include/mach Move headers to mach-socfpga as well. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>	10 years ago
Dinh Nguyen	b9b5cf0ea3	socfpga: correctly increment freeze_controller_base address Correctly increment the base address of the freeze controller. And since SYSMGR_FRZCTRL_VIOCTRL_SHIFT is not needed, remove it from the include file. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Acked-by: Pavel Machek <pavel@denx.de> Cc: Wolfgang Denk <wd@denx.de>	11 years ago
Chin Liang See	4c54419737	socfpga: Adding Freeze Controller driver Adding Freeze Controller driver. All HPS IOs need to be in freeze state during pin mux or IO buffer configuration. It is to avoid any glitch which might happen during the configuration from propagating to external devices. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>	12 years ago

Author

SHA1

Message

Date

Masahiro Yamada

30088b0997

ARM: socfpga: move SoC headers to mach-socfpga/include/mach

Move headers to mach-socfpga as well.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

10 years ago

Dinh Nguyen

b9b5cf0ea3

socfpga: correctly increment freeze_controller_base address

Correctly increment the base address of the freeze controller. And since
SYSMGR_FRZCTRL_VIOCTRL_SHIFT is not needed, remove it from the include file.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

11 years ago

Chin Liang See

4c54419737

socfpga: Adding Freeze Controller driver

Adding Freeze Controller driver. All HPS IOs need to be
in freeze state during pin mux or IO buffer configuration.
It is to avoid any glitch which might happen
during the configuration from propagating to external devices.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

12 years ago

1 Commits (e1417c7b66f4e0051a3aa242f655e85c1c96eef2)