The Board names in the board select menu were simply taken from the
board directory name by a conversion tool when switching to Kconfig.
Let's use more descriptive prompts taken from
include/configs/gr*.h and board/gaisler/*/config.mk.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
R8A7791, R8A7793 and R8A7794 have same IP of USB controller.
This collect up address data of each SoCs.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
R8A7793 has same IP of USB controller as R8A7791 and R8A7794 of rmobile
ARM SoCs. This adds support R8A7793 to EHCI HCD of rmobile.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Waiting an interrupt packet to complete in usb_kbd_poll_for_event, causes
a 40 ms latency for each call to usb_kbd_testc, which is undesirable.
Using control messages leads to lower (but still not 0) latency, but some
devices do not work well with control messages (e.g. my kvm behaves funny
with them).
This commit adds support for using the int_queue mechanism which at least
the ehci-hcd driver supports. This allows polling with 0 latency, while
using interrupt packets.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
stdio_register makes a malloc-ed copy of struct stdio_dev through stdio_clone,
free the malloc-ed memory on stdio_deregister.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
If the device has a parent, it is instantiated from usb_hub_port_connect_change
and the portnr is right there in dev->portnr, so there is no need for this
whole dance to look it up.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
A bit field of DMA descriptor is on memory area of DMA. If we set data
to bit of DMA descriptor, we must be writeback data of DMA descriptor.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
RX_DESC_SIZE and TX_DESC_SIZE mean the size of the data descriptor for sh-eth.
We can acquire this in sizeof. It is not necessary to define these in define.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
R8A7793 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7793.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This adds the preset value to register for R8A7793.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This adds support for USB commands and USB storage device.
Signed-off-by: Yoshiyuki Ito <yoshiyuki.ito.ub@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Alt board use SCIF2, not SCIF0.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since board info structure is not still set up, the setting of RAM
address causes illegal access.
Therefore the setting of RAM address is removed.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since board info structure is not still set up, the setting of RAM
address causes illegal access.
Therefore the setting of RAM address is removed.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since board info structure is not still set up, the setting of RAM
address causes illegal access.
Therefore the setting of RAM address is removed.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM.
The default boot address is 0x70000000.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM.
The default boot address is 0x70000000.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM.
The default boot address is 0xB0000000.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The change of the CPU frequency is waited for until PLL0ST of the PLLECR is
set to 1.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Initialization of L2CTLR[5] was set only as R8A7790 by commit
237faf095f.
However, initialization of cash needs to be performed continuously.
This changes into the processing which continues initialization of
L2CTLR[5] into L2CTLR cash and performs it.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Commit f91c09acf5 ("ARM: mx6: Add support for Kosagi Novena") missed to
add a MAINTAINERS file, so add Marek as the maintainer.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
155fa9af95 "spi: mxc: fix sf probe when using mxc_spi" break
spi flash detection on the aristainetos board. Fix this.
Signed-off-by: Heiko Schocher <hs@denx.de>
On mx6 sabreauto board, there are two USB ports:
0: OTG
1: HOST
The EHCI driver is enabled for this board, but the IOMUX and VBUS power
control is not implemented, which cause both USB port failed to work.
This patch fix the problem by adding the board support codes.
Since the power control uses the GPIO pin from port expander MAX7310,
the PCA953X driver is enabled for accessing the MAX7310.
The ID pin of OTG Port needs to configure the GPR1 bit 13 for selecting
its daisy chain. Add a new function "imx_iomux_set_gpr_register" to
handle GPR register setting.
Signed-off-by: Ye.Li <B37916@freescale.com>
There are three SD/MMC sockets on mx6slevk boards. Implements the
full support for them.
The default boot socket is USDHC2, so the MMC environment is set
to that device.
Signed-off-by: Ye.Li <B37916@freescale.com>
Set the CONFIG_MXC_GPT_HCLK configuration in mx6_common.h, so that
24Mhz OSC clock source will be selected for GPT on all MX6 platforms.
Signed-off-by: Ye.Li <B37916@freescale.com>
For MX6SL and MX6SX, the perclk can come from OSC 24Mhz source. Fix
the get_ipg_per_clk function to support it.
Signed-off-by: Ye.Li <B37916@freescale.com>
Introduce a new configuration "CONFIG_MXC_GPT_HCLK". When it is set,
the GPT will select a high frequency clock as clock source.
Otherwise, the GPT will stay to use 32Khz OSC as clock source.
In the implementation, since only the GPT on i.MX6 series provide the
clock source option for 24Mhz OSC. For others (only i.MX5 and i.MX6
compile the driver), if the configuration is set, the perclk will be
selected as clock source.
MX6Q/D Rev 1.0 and MX6SL are special in the implementation, because they
don't have the 24Mhz OSC clock source option, so also select the perclk
for them. For MX6SL, we will set the OSC 24Mhz to perclk in CCM, so
eventually the clock comes from OSC 24Mhz.
Signed-off-by: Ye.Li <B37916@freescale.com>
In system boot chapter of i.MX6 reference manual, the "Image Vector Table"
figure shows the bootdata.start points to the beginning of the destination
memory. It means the bootdata.size should contain the IVT offset part,
but the calculation in imximage tool does not have.
We found this issue when booting from QuadSPI NOR on i.MX6SX. The u-boot
runs into abnormal (crash or stop) after booting. After checked the destination
memory where the image is loaded to, there are hundreds of bytes at
the image end are not loaded into memory. Since there is a 4096 bytes
round in the calculation, for the booting devices using smaller IVT offset,
such as SD and SPI booting, they are not easy to reproduce.
Signed-off-by: Ye.Li <B37916@freescale.com>
Masahiro Yamada
Jeroen Hofstee
Tom Rini
Nobuhiro Iwamatsu
Hans de Goede
Fabio Estevam
Heiko Schocher
Ye.Li