upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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66 lines
1.9 KiB
66 lines
1.9 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
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*/
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#include <linux/bitops.h>
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enum axp209_reg {
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AXP209_POWER_STATUS = 0x00,
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AXP209_CHIP_VERSION = 0x03,
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AXP209_OUTPUT_CTRL = 0x12,
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AXP209_DCDC2_VOLTAGE = 0x23,
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AXP209_DCDC3_VOLTAGE = 0x27,
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AXP209_LDO24_VOLTAGE = 0x28,
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AXP209_LDO3_VOLTAGE = 0x29,
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AXP209_IRQ_ENABLE1 = 0x40,
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AXP209_IRQ_ENABLE2 = 0x41,
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AXP209_IRQ_ENABLE3 = 0x42,
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AXP209_IRQ_ENABLE4 = 0x43,
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AXP209_IRQ_ENABLE5 = 0x44,
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AXP209_IRQ_STATUS5 = 0x4c,
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AXP209_SHUTDOWN = 0x32,
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};
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#define AXP209_POWER_STATUS_ON_BY_DC BIT(0)
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#define AXP209_POWER_STATUS_VBUS_USABLE BIT(4)
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#define AXP209_CHIP_VERSION_MASK 0x0f
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#define AXP209_OUTPUT_CTRL_EXTEN BIT(0)
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#define AXP209_OUTPUT_CTRL_DCDC3 BIT(1)
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#define AXP209_OUTPUT_CTRL_LDO2 BIT(2)
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#define AXP209_OUTPUT_CTRL_LDO4 BIT(3)
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#define AXP209_OUTPUT_CTRL_DCDC2 BIT(4)
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#define AXP209_OUTPUT_CTRL_LDO3 BIT(6)
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#define AXP209_LDO24_LDO2_MASK 0xf0
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#define AXP209_LDO24_LDO4_MASK 0x0f
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#define AXP209_LDO24_LDO2_SET(reg, cfg) \
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(((reg) & ~AXP209_LDO24_LDO2_MASK) | \
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(((cfg) << 4) & AXP209_LDO24_LDO2_MASK))
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#define AXP209_LDO24_LDO4_SET(reg, cfg) \
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(((reg) & ~AXP209_LDO24_LDO4_MASK) | \
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(((cfg) << 0) & AXP209_LDO24_LDO4_MASK))
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#define AXP209_LDO3_VOLTAGE_FROM_LDO3IN BIT(7)
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#define AXP209_LDO3_VOLTAGE_MASK 0x7f
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#define AXP209_LDO3_VOLTAGE_SET(x) ((x) & AXP209_LDO3_VOLTAGE_MASK)
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#define AXP209_IRQ5_PEK_UP BIT(6)
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#define AXP209_IRQ5_PEK_DOWN BIT(5)
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#define AXP209_POWEROFF BIT(7)
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/* For axp_gpio.c */
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#define AXP_POWER_STATUS 0x00
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#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5)
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#define AXP_GPIO0_CTRL 0x90
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#define AXP_GPIO1_CTRL 0x92
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#define AXP_GPIO2_CTRL 0x93
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#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */
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#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */
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#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */
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#define AXP_GPIO_STATE 0x94
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#define AXP_GPIO_STATE_OFFSET 4
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