upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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87 lines
2.5 KiB
87 lines
2.5 KiB
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for AM6 SoC Family
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*
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* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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model = "Texas Instruments K3 AM654 SoC";
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compatible = "ti,am654";
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interrupt-parent = <&gic500>;
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#address-cells = <2>;
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#size-cells = <2>;
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chosen { };
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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psci: psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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};
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a53_timer0: timer-cl0-cpu0 {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */
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<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */
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<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */
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<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */
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};
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pmu: pmu {
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compatible = "arm,armv8-pmuv3";
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/* Recommendation from GIC500 TRM Table A.3 */
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interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
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};
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cbass_main: interconnect@100000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00100000 0x00 0x00100000 0x00020000>, /* ctrl mmr */
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<0x00600000 0x00 0x00600000 0x00001100>, /* GPIO */
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<0x00900000 0x00 0x00900000 0x00012000>, /* serdes */
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<0x01000000 0x00 0x01000000 0x0af02400>, /* Most peripherals */
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<0x30800000 0x00 0x30800000 0x0bc00000>, /* MAIN NAVSS */
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/* MCUSS Range */
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<0x28380000 0x00 0x28380000 0x03880000>,
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<0x40200000 0x00 0x40200000 0x00900100>,
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<0x42040000 0x00 0x42040000 0x03ac2400>,
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<0x45100000 0x00 0x45100000 0x00c24000>,
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<0x46000000 0x00 0x46000000 0x00200000>,
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<0x47000000 0x00 0x47000000 0x00068400>;
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cbass_mcu: interconnect@28380000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x28380000 0x28380000 0x03880000>, /* MCU NAVSS*/
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<0x40200000 0x40200000 0x00900100>, /* First peripheral window */
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<0x42040000 0x42040000 0x03ac2400>, /* WKUP */
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<0x45100000 0x45100000 0x00c24000>, /* MMRs, remaining NAVSS */
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<0x46000000 0x46000000 0x00200000>, /* CPSW */
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<0x47000000 0x47000000 0x00068400>; /* OSPI space 1 */
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cbass_wakeup: interconnect@42040000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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/* WKUP Basic peripherals */
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ranges = <0x42040000 0x42040000 0x03ac2400>;
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};
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};
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};
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};
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/* Now include the peripherals for each bus segments */
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#include "k3-am65-main.dtsi"
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