upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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37 lines
869 B
37 lines
869 B
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2016 Marvell International Ltd.
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*/
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#include <asm/arch-armada8k/cache_llc.h>
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#include <linux/linkage.h>
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/*
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* int __asm_flush_l3_dcache
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*
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* flush Armada-8K last level cache.
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*
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*/
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ENTRY(__asm_flush_l3_dcache)
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/* flush cache */
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mov x0, #LLC_BASE_ADDR
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add x0, x0, #LLC_FLUSH_BY_WAY
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movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
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mov w1, #LLC_WAY_MASK
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str w1, [x0]
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/* sync cache */
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mov x0, #LLC_BASE_ADDR
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add x0, x0, #LLC_CACHE_SYNC
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movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
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str wzr, [x0]
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/* check that cache sync completed */
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mov x0, #LLC_BASE_ADDR
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add x0, x0, #LLC_CACHE_SYNC_COMPLETE
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movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
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1: ldr w1, [x0]
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and w1, w1, #LLC_CACHE_SYNC_MASK
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cbnz w1, 1b
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/* return success */
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mov x0, #0
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ret
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ENDPROC(__asm_flush_l3_dcache)
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