upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/drivers/pinctrl/meson/pinctrl-meson.h

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2.8 KiB

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
*/
#ifndef __PINCTRL_MESON_H__
#define __PINCTRL_MESON_H__
#include <linux/types.h>
struct meson_pmx_group {
const char *name;
const unsigned int *pins;
unsigned int num_pins;
bool is_gpio;
unsigned int reg;
unsigned int bit;
};
struct meson_pmx_func {
const char *name;
const char * const *groups;
unsigned int num_groups;
};
struct meson_pinctrl_data {
const char *name;
struct meson_pmx_group *groups;
struct meson_pmx_func *funcs;
struct meson_bank *banks;
unsigned int pin_base;
unsigned int num_pins;
unsigned int num_groups;
unsigned int num_funcs;
unsigned int num_banks;
};
struct meson_pinctrl {
struct meson_pinctrl_data *data;
void __iomem *reg_mux;
void __iomem *reg_gpio;
};
/**
* struct meson_reg_desc - a register descriptor
*
* @reg: register offset in the regmap
* @bit: bit index in register
*
* The structure describes the information needed to control pull,
* pull-enable, direction, etc. for a single pin
*/
struct meson_reg_desc {
unsigned int reg;
unsigned int bit;
};
/**
* enum meson_reg_type - type of registers encoded in @meson_reg_desc
*/
enum meson_reg_type {
REG_PULLEN,
REG_PULL,
REG_DIR,
REG_OUT,
REG_IN,
NUM_REG,
};
/**
* struct meson bank
*
* @name: bank name
* @first: first pin of the bank
* @last: last pin of the bank
* @regs: array of register descriptors
*
* A bank represents a set of pins controlled by a contiguous set of
* bits in the domain registers. The structure specifies which bits in
* the regmap control the different functionalities. Each member of
* the @regs array refers to the first pin of the bank.
*/
struct meson_bank {
const char *name;
unsigned int first;
unsigned int last;
struct meson_reg_desc regs[NUM_REG];
};
#define PIN(x, b) (b + x)
#define GROUP(grp, r, b) \
{ \
.name = #grp, \
.pins = grp ## _pins, \
.num_pins = ARRAY_SIZE(grp ## _pins), \
.reg = r, \
.bit = b, \
}
#define GPIO_GROUP(gpio, b) \
{ \
.name = #gpio, \
.pins = (const unsigned int[]){ PIN(gpio, b) }, \
.num_pins = 1, \
.is_gpio = true, \
}
#define FUNCTION(fn) \
{ \
.name = #fn, \
.groups = fn ## _groups, \
.num_groups = ARRAY_SIZE(fn ## _groups), \
}
#define BANK(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
{ \
.name = n, \
.first = f, \
.last = l, \
.regs = { \
[REG_PULLEN] = { per, peb }, \
[REG_PULL] = { pr, pb }, \
[REG_DIR] = { dr, db }, \
[REG_OUT] = { or, ob }, \
[REG_IN] = { ir, ib }, \
}, \
}
#define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
extern const struct pinctrl_ops meson_pinctrl_ops;
int meson_pinctrl_probe(struct udevice *dev);
#endif /* __PINCTRL_MESON_H__ */