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upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/drivers/ddr/marvell/a38x
History
Chris Packham 672e559830
ddr: marvell: update ddr controller init and freq 		7 years ago
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Makefile
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ddr3_a38x.c
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ddr3_a38x.h
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ddr3_a38x_mc_static.h
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ddr3_a38x_topology.h
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ddr3_a38x_training.c
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ddr3_debug.c
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ddr3_hws_hw_training.c
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ddr3_hws_hw_training.h
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ddr3_hws_hw_training_def.h
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ddr3_hws_sil_training.h
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ddr3_init.c
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ddr3_init.h
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ddr3_logging_def.h
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ddr3_patterns_64bit.h
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ddr3_topology_def.h
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ddr3_training.c
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ddr3_training_bist.c
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ddr3_training_centralization.c
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ddr3_training_db.c
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ddr3_training_hw_algo.c
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ddr3_training_hw_algo.h
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ddr3_training_ip.h
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ddr3_training_ip_bist.h
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ddr3_training_ip_centralization.h
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ddr3_training_ip_db.h
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ddr3_training_ip_def.h
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ddr3_training_ip_engine.c
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ddr3_training_ip_engine.h
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ddr3_training_ip_flow.h
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ddr3_training_ip_pbs.h
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ddr3_training_ip_prv_if.h
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ddr3_training_ip_static.h
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ddr3_training_leveling.c
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ddr3_training_leveling.h
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ddr3_training_pbs.c
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ddr3_training_static.c
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ddr_topology_def.h
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ddr_training_ip_db.h
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silicon_if.h
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xor.c
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xor.h
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xor_regs.h
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