upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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54 lines
1.4 KiB
54 lines
1.4 KiB
/*
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* hardware_am33xx.h
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*
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* AM33xx hardware specific header
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*
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* Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __AM33XX_HARDWARE_AM33XX_H
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#define __AM33XX_HARDWARE_AM33XX_H
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/* Module base addresses */
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/* UART Base Address */
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#define UART0_BASE 0x44E09000
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/* GPIO Base address */
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#define GPIO2_BASE 0x481AC000
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/* Watchdog Timer */
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#define WDT_BASE 0x44E35000
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/* Control Module Base Address */
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#define CTRL_BASE 0x44E10000
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#define CTRL_DEVICE_BASE 0x44E10600
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/* PRCM Base Address */
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#define PRCM_BASE 0x44E00000
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/* VTP Base address */
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#define VTP0_CTRL_ADDR 0x44E10E0C
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/* DDR Base address */
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#define DDR_PHY_CMD_ADDR 0x44E12000
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#define DDR_PHY_DATA_ADDR 0x44E120C8
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#define DDR_DATA_REGS_NR 2
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/* CPSW Config space */
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#define CPSW_MDIO_BASE 0x4A101000
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/* RTC base address */
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#define RTC_BASE 0x44E3E000
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#endif /* __AM33XX_HARDWARE_AM33XX_H */
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