upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Stefano Babic c4559daa91 MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged ... After an update to the MX51 reference manual (Rev. 5), the values of the PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH are now clearly wrong: "Bit 13: High / Low Output Voltage Range. This bit selects the output voltage mode for SD2_CMD. 0 High output voltage mode 1 Low output voltage mode" The values are currently negated in code - fixed. Reported-by: David Jander <david.jander@protonic.nl> Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: David Jander <david.jander@protonic.nl> Acked-by: David Jander <david.jander@protonic.nl> Acked-by: Marek Vasut <marek.vasut@gmail.com>		13 years ago
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clock.h	mx5: Add clock config interface	13 years ago
crm_regs.h	mx5: Add clock config interface	13 years ago
gpio.h	MX5: make use of GPIO framework for MX5 processor	13 years ago
imx-regs.h	mx53loco: Add CONFIG_REVISION_TAG	13 years ago
iomux.h	MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged	13 years ago
mx5x_pins.h	imx: Remove unneeded/repititive definitions from imx headers	13 years ago
sys_proto.h	mx53loco: Allow to print CPU information at a later stage	13 years ago