upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/arch/m68k/cpu/mcf5445x/cpu.c

130 lines
2.8 KiB

/*
*
* (C) Copyright 2000-2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <watchdog.h>
#include <command.h>
#include <netdev.h>
#include <asm/immap.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
rcm_t *rcm = (rcm_t *) (MMAP_RCM);
udelay(1000);
out_8(&rcm->rcr, RCM_RCR_FRCRSTOUT);
udelay(10000);
setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
/* we don't return! */
return 0;
};
int checkcpu(void)
{
ccm_t *ccm = (ccm_t *) MMAP_CCM;
u16 msk;
u16 id = 0;
u8 ver;
puts("CPU: ");
msk = (in_be16(&ccm->cir) >> 6);
ver = (in_be16(&ccm->cir) & 0x003f);
switch (msk) {
case 0x48:
id = 54455;
break;
case 0x49:
id = 54454;
break;
case 0x4a:
id = 54453;
break;
case 0x4b:
id = 54452;
break;
case 0x4d:
id = 54451;
break;
case 0x4f:
id = 54450;
break;
case 0x9F:
id = 54410;
break;
case 0xA0:
id = 54415;
break;
case 0xA1:
id = 54416;
break;
case 0xA2:
id = 54417;
break;
case 0xA3:
id = 54418;
break;
}
if (id) {
char buf1[32], buf2[32], buf3[32];
printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
ver);
printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
strmhz(buf1, gd->cpu_clk),
strmhz(buf2, gd->bus_clk),
strmhz(buf3, gd->flb_clk));
#ifdef CONFIG_PCI
printf(" PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n",
strmhz(buf1, gd->pci_clk),
strmhz(buf2, gd->inp_clk),
strmhz(buf3, gd->vco_clk));
#else
printf(" INP CLK %s MHz VCO CLK %s MHz\n",
strmhz(buf1, gd->inp_clk),
strmhz(buf2, gd->vco_clk));
#endif
}
return 0;
}
#if defined(CONFIG_MCFFEC)
/* Default initializations for MCFFEC controllers. To override,
* create a board-specific function called:
* int board_eth_init(bd_t *bis)
*/
int cpu_eth_init(bd_t *bis)
{
return mcffec_initialize(bis);
}
#endif