upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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73 lines
1.9 KiB
73 lines
1.9 KiB
/*
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* (C) Copyright 2000, 2001
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* Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
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* base on code by
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <ppc_asm.tmpl>
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#include <ppc_defs.h>
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#include <config.h>
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#include <watchdog.h>
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/*
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* unsigned long long get_ticks(void);
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*
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* read timebase as "long long"
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*/
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.globl get_ticks
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get_ticks:
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1: mftbu r3
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mftb r4
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mftbu r5
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cmp 0,r3,r5
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bne 1b
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blr
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/*
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* Delay for a number of ticks
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*/
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.globl wait_ticks
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wait_ticks:
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stwu r1, -16(r1)
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mflr r0 /* save link register */
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stw r0, 20(r1) /* Use r0 or GDB will be unhappy */
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stw r14, 12(r1) /* save used registers */
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stw r15, 8(r1)
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mr r14, r3 /* save tick count */
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bl get_ticks /* Get start time */
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/* Calculate end time */
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addc r14, r4, r14 /* Compute end time lower */
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addze r15, r3 /* and end time upper */
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WATCHDOG_RESET /* Trigger watchdog, if needed */
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1: bl get_ticks /* Get current time */
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subfc r4, r4, r14 /* Subtract current time from end time */
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subfe. r3, r3, r15
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bge 1b /* Loop until time expired */
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lwz r15, 8(r1) /* restore saved registers */
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lwz r14, 12(r1)
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lwz r0, 20(r1)
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addi r1,r1,16
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mtlr r0
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blr
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