upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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383 lines
8.1 KiB
383 lines
8.1 KiB
/*
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* Copyright (C) 2010 Samsung Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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* Kyungmin Park <kyungmin.park@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <spi.h>
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#include <lcd.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/adc.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/watchdog.h>
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#include <ld9040.h>
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#include <power/pmic.h>
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#include <usb.h>
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#include <usb/dwc2_udc.h>
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#include <asm/arch/cpu.h>
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#include <power/max8998_pmic.h>
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#include <libtizen.h>
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#include <samsung/misc.h>
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#include <usb_mass_storage.h>
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DECLARE_GLOBAL_DATA_PTR;
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unsigned int board_rev;
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u32 get_board_rev(void)
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{
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return board_rev;
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}
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static int get_hwrev(void)
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{
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return board_rev & 0xFF;
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}
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static void init_pmic_lcd(void);
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int exynos_power_init(void)
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{
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int ret;
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/*
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* For PMIC the I2C bus is named as I2C5, but it is connected
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* to logical I2C adapter 0
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*/
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ret = pmic_init(I2C_0);
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if (ret)
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return ret;
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init_pmic_lcd();
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return 0;
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}
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static unsigned short get_adc_value(int channel)
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{
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struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
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unsigned short ret = 0;
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unsigned int reg;
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unsigned int loop = 0;
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writel(channel & 0xF, &adc->adcmux);
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writel((1 << 14) | (49 << 6), &adc->adccon);
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writel(1000 & 0xffff, &adc->adcdly);
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writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
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udelay(10);
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writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
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udelay(10);
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do {
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udelay(1);
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reg = readl(&adc->adccon);
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} while (!(reg & (1 << 15)) && (loop++ < 1000));
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ret = readl(&adc->adcdat0) & 0xFFF;
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return ret;
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}
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static int adc_power_control(int on)
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{
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int ret;
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struct pmic *p = pmic_get("MAX8998_PMIC");
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if (!p)
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return -ENODEV;
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if (pmic_probe(p))
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return -1;
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ret = pmic_set_output(p,
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MAX8998_REG_ONOFF1,
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MAX8998_LDO4, !!on);
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return ret;
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}
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static unsigned int get_hw_revision(void)
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{
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int hwrev, mode0, mode1;
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adc_power_control(1);
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mode0 = get_adc_value(1); /* HWREV_MODE0 */
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mode1 = get_adc_value(2); /* HWREV_MODE1 */
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/*
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* XXX Always set the default hwrev as the latest board
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* ADC = (voltage) / 3.3 * 4096
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*/
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hwrev = 3;
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#define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
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if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
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hwrev = 0x0; /* 0.01V 0.01V */
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if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
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hwrev = 0x1; /* 610mV 0.01V */
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if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
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hwrev = 0x2; /* 1.16V 0.01V */
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if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
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hwrev = 0x3; /* 1.79V 0.01V */
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#undef IS_RANGE
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debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
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adc_power_control(0);
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return hwrev;
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}
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static void check_hw_revision(void)
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{
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int hwrev;
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hwrev = get_hw_revision();
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board_rev |= hwrev;
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}
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#ifdef CONFIG_USB_GADGET
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static int s5pc210_phy_control(int on)
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{
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int ret = 0;
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struct pmic *p = pmic_get("MAX8998_PMIC");
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if (!p)
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return -ENODEV;
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if (pmic_probe(p))
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return -1;
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if (on) {
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ret |= pmic_set_output(p,
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MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
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MAX8998_SAFEOUT1, LDO_ON);
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ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
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MAX8998_LDO3, LDO_ON);
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ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
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MAX8998_LDO8, LDO_ON);
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} else {
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ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
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MAX8998_LDO8, LDO_OFF);
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ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
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MAX8998_LDO3, LDO_OFF);
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ret |= pmic_set_output(p,
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MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
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MAX8998_SAFEOUT1, LDO_OFF);
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}
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if (ret) {
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puts("MAX8998 LDO setting error!\n");
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return -1;
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}
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return 0;
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}
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struct dwc2_plat_otg_data s5pc210_otg_data = {
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.phy_control = s5pc210_phy_control,
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.regs_phy = EXYNOS4_USBPHY_BASE,
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.regs_otg = EXYNOS4_USBOTG_BASE,
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.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
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.usb_flags = PHY0_SLEEP,
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};
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#endif
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int board_usb_init(int index, enum usb_init_type init)
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{
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debug("USB_udc_probe\n");
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return dwc2_udc_probe(&s5pc210_otg_data);
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}
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int exynos_early_init_f(void)
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{
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wdt_stop();
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return 0;
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}
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static void init_pmic_lcd(void)
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{
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unsigned char val;
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int ret = 0;
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struct pmic *p = pmic_get("MAX8998_PMIC");
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if (!p)
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return;
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if (pmic_probe(p))
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return;
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/* LDO7 1.8V */
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val = 0x02; /* (1800 - 1600) / 100; */
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ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val);
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/* LDO17 3.0V */
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val = 0xe; /* (3000 - 1600) / 100; */
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ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val);
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/* Disable unneeded regulators */
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/*
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* ONOFF1
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* Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
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* LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
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*/
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val = 0xB9;
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ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
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/* ONOFF2
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* LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
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* LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
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*/
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val = 0x50;
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ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
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/* ONOFF3
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* LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
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* EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
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*/
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val = 0x00;
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ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
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if (ret)
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puts("LCD pmic initialisation error!\n");
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}
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void exynos_cfg_lcd_gpio(void)
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{
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unsigned int i, f3_end = 4;
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for (i = 0; i < 8; i++) {
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/* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
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gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
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gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
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gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
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/* pull-up/down disable */
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gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
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gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
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gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
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/* drive strength to max (24bit) */
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gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
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gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
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gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
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gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
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gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
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gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
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}
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for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
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/* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
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gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
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/* pull-up/down disable */
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gpio_set_pull(i, S5P_GPIO_PULL_NONE);
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/* drive strength to max (24bit) */
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gpio_set_drv(i, S5P_GPIO_DRV_4X);
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gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
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}
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/* gpio pad configuration for LCD reset. */
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gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
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gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
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}
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int mipi_power(void)
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{
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return 0;
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}
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void exynos_reset_lcd(void)
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{
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gpio_set_value(EXYNOS4_GPIO_Y45, 1);
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udelay(10000);
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gpio_set_value(EXYNOS4_GPIO_Y45, 0);
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udelay(10000);
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gpio_set_value(EXYNOS4_GPIO_Y45, 1);
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udelay(100);
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}
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void exynos_lcd_power_on(void)
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{
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struct pmic *p = pmic_get("MAX8998_PMIC");
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if (!p)
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return;
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if (pmic_probe(p))
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return;
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pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
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pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
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}
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void exynos_cfg_ldo(void)
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{
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ld9040_cfg_ldo();
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}
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void exynos_enable_ldo(unsigned int onoff)
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{
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ld9040_enable_ldo(onoff);
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}
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int exynos_init(void)
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{
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char buf[16];
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gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
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switch (get_hwrev()) {
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case 0:
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/*
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* Set the low to enable LDO_EN
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* But when you use the test board for eMMC booting
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* you should set it HIGH since it removes the inverter
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*/
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/* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
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gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
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gpio_direction_output(EXYNOS4_GPIO_E36, 0);
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break;
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default:
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/*
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* Default reset state is High and there's no inverter
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* But set it as HIGH to ensure
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*/
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/* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
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gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
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gpio_direction_output(EXYNOS4_GPIO_E13, 1);
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break;
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}
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/* Request soft I2C gpios */
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strcpy(buf, "soft_i2c_scl");
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gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, buf);
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strcpy(buf, "soft_i2c_sda");
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gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, buf);
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check_hw_revision();
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printf("HW Revision:\t0x%x\n", board_rev);
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return 0;
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}
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#ifdef CONFIG_LCD
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void exynos_lcd_misc_init(vidinfo_t *vid)
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{
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#ifdef CONFIG_TIZEN
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get_tizen_logo_info(vid);
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#endif
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/* for LD9040. */
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vid->pclk_name = 1; /* MPLL */
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vid->sclk_div = 1;
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setenv("lcdinfo", "lcd=ld9040");
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}
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#endif
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