upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Konstantin Porotchkin b58385df3a arm64: mvebu: Add L3 cache flush functionality to A8K family ... Add missing L3 cache flush functionality which absence prevents Linux kernel from normal boot in case the L3 cache is enabled by ATF. The L3 cache is named the "last level" cache in order to keep the terminology similar to the ATF code. This cache should not be disabled by u-boot since the Linux kernel cannot activate it, so it is activates at ATF stage. However the cache flush is required for preventing data corruption after disabling the MMU and the data cache before passing control to the loaded Linux image. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>		8 years ago
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armada8k	arm64: mvebu: Add L3 cache flush functionality to A8K family	8 years ago
armada3700	…
include/mach	…
serdes	…
Kconfig	arm64: mvebu: Rename db-88f7040 files to armada-8k	8 years ago
Makefile	…
arm64-common.c	arm64: mvebu: Restrict memory size to a usable maximum	8 years ago
cpu.c	…
dram.c	…
gpio.c	…
lowlevel_spl.S	…
mbus.c	…
sata.c	…
spl.c	…
timer.c	…