upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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75 lines
1.5 KiB
75 lines
1.5 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2016-17 Microsemi Corporation.
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* Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com>
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*
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* Copyright (C) 2017 Andes Technology Corporation
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* Rick Chen, Andes Technology Corporation <rick@andestech.com>
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*/
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#include <common.h>
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#include <asm/ptrace.h>
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#include <asm/system.h>
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#include <asm/encoding.h>
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static void _exit_trap(int code, uint epc, struct pt_regs *regs);
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int interrupt_init(void)
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{
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return 0;
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}
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/*
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* enable interrupts
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*/
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void enable_interrupts(void)
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{
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}
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/*
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* disable interrupts
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*/
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int disable_interrupts(void)
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{
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return 0;
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}
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uint handle_trap(uint mcause, uint epc, struct pt_regs *regs)
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{
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uint is_int;
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is_int = (mcause & MCAUSE_INT);
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if ((is_int) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT))
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external_interrupt(0); /* handle_m_ext_interrupt */
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else if ((is_int) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER))
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timer_interrupt(0); /* handle_m_timer_interrupt */
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else
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_exit_trap(mcause, epc, regs);
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return epc;
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}
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/*
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*Entry Point for PLIC Interrupt Handler
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*/
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__attribute__((weak)) void external_interrupt(struct pt_regs *regs)
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{
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}
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__attribute__((weak)) void timer_interrupt(struct pt_regs *regs)
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{
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}
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static void _exit_trap(int code, uint epc, struct pt_regs *regs)
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{
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static const char * const exception_code[] = {
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"Instruction address misaligned",
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"Instruction access fault",
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"Illegal instruction",
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"Breakpoint",
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"Load address misaligned"
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};
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printf("exception code: %d , %s , epc %08x , ra %08lx\n",
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code, exception_code[code], epc, regs->ra);
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}
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