upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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58 lines
1.2 KiB
58 lines
1.2 KiB
/*
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* (C) Copyright 2009
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_CLOCK_H
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#define __ASM_ARCH_CLOCK_H
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#include <common.h>
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#ifdef CONFIG_SYS_MX5_HCLK
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#define MXC_HCLK CONFIG_SYS_MX5_HCLK
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#else
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#define MXC_HCLK 24000000
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#endif
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#ifdef CONFIG_SYS_MX5_CLK32
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#define MXC_CLK32 CONFIG_SYS_MX5_CLK32
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#else
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#define MXC_CLK32 32768
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#endif
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enum mxc_clock {
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MXC_ARM_CLK = 0,
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MXC_AHB_CLK,
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MXC_IPG_CLK,
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MXC_IPG_PERCLK,
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MXC_UART_CLK,
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MXC_CSPI_CLK,
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MXC_ESDHC_CLK,
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MXC_ESDHC2_CLK,
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MXC_ESDHC3_CLK,
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MXC_ESDHC4_CLK,
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MXC_FEC_CLK,
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MXC_SATA_CLK,
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MXC_DDR_CLK,
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MXC_NFC_CLK,
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MXC_PERIPH_CLK,
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MXC_I2C_CLK,
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};
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u32 imx_get_uartclk(void);
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u32 imx_get_fecclk(void);
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unsigned int mxc_get_clock(enum mxc_clock clk);
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int mxc_set_clock(u32 ref, u32 freq, u32 clk_type);
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void set_usb_phy_clk(void);
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void enable_usb_phy1_clk(bool enable);
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void enable_usb_phy2_clk(bool enable);
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void set_usboh3_clk(void);
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void enable_usboh3_clk(bool enable);
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void mxc_set_sata_internal_clock(void);
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int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
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void enable_nfc_clk(unsigned char enable);
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void enable_efuse_prog_supply(bool enable);
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#endif /* __ASM_ARCH_CLOCK_H */
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