upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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121 lines
3.1 KiB
121 lines
3.1 KiB
/*
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* (C) Copyright 2000
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* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#ifdef CFG_NS87308
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#include <ns87308.h>
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void initialise_ns87308 (void)
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{
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#ifdef CFG_NS87308_PS2MOD
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unsigned char data;
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/*
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* Switch floppy drive to PS/2 mode.
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*/
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read_pnp_config(SUPOERIO_CONF1, &data);
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data &= 0xFB;
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write_pnp_config(SUPOERIO_CONF1, data);
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#endif
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#if (CFG_NS87308_DEVS & CFG_NS87308_KBC1)
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PNP_SET_DEVICE_BASE(LDEV_KBC1, CFG_NS87308_KBC1_BASE);
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write_pnp_config(LUN_CONFIG_REG, 0);
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write_pnp_config(CBASE_HIGH, 0x00);
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write_pnp_config(CBASE_LOW, 0x64);
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#endif
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#if (CFG_NS87308_DEVS & CFG_NS87308_MOUSE)
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PNP_ACTIVATE_DEVICE(LDEV_MOUSE);
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#endif
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#if (CFG_NS87308_DEVS & CFG_NS87308_RTC_APC)
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PNP_SET_DEVICE_BASE(LDEV_RTC_APC, CFG_NS87308_RTC_BASE);
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#endif
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#if (CFG_NS87308_DEVS & CFG_NS87308_FDC)
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PNP_SET_DEVICE_BASE(LDEV_FDC, CFG_NS87308_FDC_BASE);
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write_pnp_config(LUN_CONFIG_REG, 0x40);
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#endif
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#if (CFG_NS87308_DEVS & CFG_NS87308_RARP)
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PNP_SET_DEVICE_BASE(LDEV_PARP, CFG_NS87308_LPT_BASE);
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#endif
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#if (CFG_NS87308_DEVS & CFG_NS87308_UART1)
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PNP_SET_DEVICE_BASE(LDEV_UART1, CFG_NS87308_UART1_BASE);
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#endif
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#if (CFG_NS87308_DEVS & CFG_NS87308_UART2)
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PNP_SET_DEVICE_BASE(LDEV_UART2, CFG_NS87308_UART2_BASE);
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#endif
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#if (CFG_NS87308_DEVS & CFG_NS87308_GPIO)
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PNP_SET_DEVICE_BASE(LDEV_GPIO, CFG_NS87308_GPIO_BASE);
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#endif
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#if (CFG_NS87308_DEVS & CFG_NS87308_POWRMAN)
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#ifndef CFG_NS87308_PWMAN_BASE
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PNP_ACTIVATE_DEVICE(LDEV_POWRMAN);
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#else
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PNP_SET_DEVICE_BASE(LDEV_POWRMAN, CFG_NS87308_PWMAN_BASE);
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/*
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* Enable all units
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*/
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write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_FER1, 0x7d);
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write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_FER2, 0x87);
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#ifdef CFG_NS87308_PMC1
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write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC1, CFG_NS87308_PMC1);
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#endif
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#ifdef CFG_NS87308_PMC2
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write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC2, CFG_NS87308_PMC2);
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#endif
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#ifdef CFG_NS87308_PMC3
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write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC3, CFG_NS87308_PMC3);
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#endif
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#endif
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#endif
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#ifdef CFG_NS87308_CS0_BASE
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PNP_PGCS_CSLINE_BASE(0, CFG_NS87308_CS0_BASE);
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PNP_PGCS_CSLINE_CONF(0, CFG_NS87308_CS0_CONF);
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#endif
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#ifdef CFG_NS87308_CS1_BASE
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PNP_PGCS_CSLINE_BASE(1, CFG_NS87308_CS1_BASE);
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PNP_PGCS_CSLINE_CONF(1, CFG_NS87308_CS1_CONF);
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#endif
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#ifdef CFG_NS87308_CS2_BASE
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PNP_PGCS_CSLINE_BASE(2, CFG_NS87308_CS2_BASE);
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PNP_PGCS_CSLINE_CONF(2, CFG_NS87308_CS2_CONF);
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#endif
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}
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#endif
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