upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

Peng Fan ad7af5d7e4 imx6: cache: disable L2 before touching Auxiliary Control Register ... According PL310 TRM, Auxiliary Control Register " The register must be written to using a secure access, and it can be read using either a secure or a NS access. If you write to this register with a NS access, it results in a write response with a DECERR response, and the register is not updated. Writing to this register with the L2 cache enabled, that is, bit[0] of L2 Control Register set to 1, results in a SLVERR. " So If L2 cache is already enabled by ROM, chaning value of ACR will cause SLVERR and uboot hang. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>		9 years ago
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Kconfig	imx: imx-common: introduce boot auxiliary core	9 years ago
Makefile	arch/arm/imx-common/Makefile: Update u-boot.uim MKIMAGEFLAGS	9 years ago
cache.c	imx6: cache: disable L2 before touching Auxiliary Control Register	9 years ago
cmd_bmode.c	…
cmd_dek.c	…
cmd_hdmidet.c	…
cpu.c	mx7: Distinguish between dual and solo versions	9 years ago
ddrmc-vf610.c	vf610: refactor DDRMC code	10 years ago
hab.c	imx: hab: add mx7 secure boot support	10 years ago
i2c-mxv7.c	…
imx_bootaux.c	imx: imx-common: introduce boot auxiliary core	9 years ago
init.c	…
iomux-v3.c	…
misc.c	…
rdc-sema.c	imx: imx-common: introduce Resource Domain Controller support	9 years ago
sata.c	…
speed.c	…
spl.c	imx_common: check for Serial Downloader in spl_boot_device	9 years ago
spl_sd.cfg	…
syscounter.c	…
timer.c	imx-common: timer: clean up code	10 years ago
video.c	…