upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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170 lines
4.6 KiB
170 lines
4.6 KiB
/*
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* (C) Copyright 2008
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* Tor Krill, Excito Elektronik i Skåne , tor@excito.com
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*
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* Modelled after the ds1337 driver
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Date & Time support (no alarms) for Intersil
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* ISL1208 Real Time Clock (RTC).
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*/
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#include <common.h>
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#include <command.h>
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#include <rtc.h>
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#include <i2c.h>
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/*---------------------------------------------------------------------*/
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#ifdef DEBUG_RTC
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#define DEBUGR(fmt,args...) printf(fmt ,##args)
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#else
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#define DEBUGR(fmt,args...)
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#endif
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/*---------------------------------------------------------------------*/
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/*
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* RTC register addresses
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*/
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#define RTC_SEC_REG_ADDR 0x0
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#define RTC_MIN_REG_ADDR 0x1
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#define RTC_HR_REG_ADDR 0x2
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#define RTC_DATE_REG_ADDR 0x3
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#define RTC_MON_REG_ADDR 0x4
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#define RTC_YR_REG_ADDR 0x5
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#define RTC_DAY_REG_ADDR 0x6
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#define RTC_STAT_REG_ADDR 0x7
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/*
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* RTC control register bits
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*/
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/*
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* RTC status register bits
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*/
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#define RTC_STAT_BIT_ARST 0x80 /* AUTO RESET ENABLE BIT */
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#define RTC_STAT_BIT_XTOSCB 0x40 /* CRYSTAL OSCILLATOR ENABLE BIT */
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#define RTC_STAT_BIT_WRTC 0x10 /* WRITE RTC ENABLE BIT */
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#define RTC_STAT_BIT_ALM 0x04 /* ALARM BIT */
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#define RTC_STAT_BIT_BAT 0x02 /* BATTERY BIT */
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#define RTC_STAT_BIT_RTCF 0x01 /* REAL TIME CLOCK FAIL BIT */
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static uchar rtc_read (uchar reg);
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static void rtc_write (uchar reg, uchar val);
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static uchar bin2bcd (unsigned int n);
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static unsigned bcd2bin (uchar c);
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/*
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* Get the current time from the RTC
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*/
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int rtc_get (struct rtc_time *tmp)
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{
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int rel = 0;
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uchar sec, min, hour, mday, wday, mon, year, status;
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status = rtc_read (RTC_STAT_REG_ADDR);
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sec = rtc_read (RTC_SEC_REG_ADDR);
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min = rtc_read (RTC_MIN_REG_ADDR);
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hour = rtc_read (RTC_HR_REG_ADDR);
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wday = rtc_read (RTC_DAY_REG_ADDR);
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mday = rtc_read (RTC_DATE_REG_ADDR);
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mon = rtc_read (RTC_MON_REG_ADDR);
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year = rtc_read (RTC_YR_REG_ADDR);
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DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
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"hr: %02x min: %02x sec: %02x status: %02x\n",
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year, mon, mday, wday, hour, min, sec, status);
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if (status & RTC_STAT_BIT_RTCF) {
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printf ("### Warning: RTC oscillator has stopped\n");
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rtc_write(RTC_STAT_REG_ADDR,
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rtc_read(RTC_STAT_REG_ADDR) &~ (RTC_STAT_BIT_BAT|RTC_STAT_BIT_RTCF));
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rel = -1;
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}
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tmp->tm_sec = bcd2bin (sec & 0x7F);
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tmp->tm_min = bcd2bin (min & 0x7F);
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tmp->tm_hour = bcd2bin (hour & 0x3F);
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tmp->tm_mday = bcd2bin (mday & 0x3F);
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tmp->tm_mon = bcd2bin (mon & 0x1F);
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tmp->tm_year = bcd2bin (year)+2000;
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tmp->tm_wday = bcd2bin (wday & 0x07);
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tmp->tm_yday = 0;
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tmp->tm_isdst= 0;
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DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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return rel;
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}
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/*
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* Set the RTC
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*/
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void rtc_set (struct rtc_time *tmp)
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{
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DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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/* enable write */
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rtc_write(RTC_STAT_REG_ADDR,
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rtc_read(RTC_STAT_REG_ADDR) | RTC_STAT_BIT_WRTC);
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rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
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rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
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rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday));
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rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
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rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour) | 0x80 ); /* 24h clock */
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rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
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rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
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/* disable write */
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rtc_write(RTC_STAT_REG_ADDR,
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rtc_read(RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_WRTC);
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}
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void rtc_reset (void)
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{
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}
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/*
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* Helper functions
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*/
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static uchar rtc_read (uchar reg)
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{
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return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg));
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}
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static void rtc_write (uchar reg, uchar val)
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{
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i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
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}
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static unsigned bcd2bin (uchar n)
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{
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return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
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}
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static unsigned char bin2bcd (unsigned int n)
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{
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return (((n / 10) << 4) | (n % 10));
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}
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