upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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217 lines
4.8 KiB
217 lines
4.8 KiB
/*
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* AX88796L(NE2000) support
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*
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* (c) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef __DRIVERS_AX88796L_H__
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#define __DRIVERS_AX88796L_H__
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#define DP_DATA (0x10 << 1)
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#define START_PG 0x40 /* First page of TX buffer */
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#define START_PG2 0x48
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#define STOP_PG 0x80 /* Last page +1 of RX ring */
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#define TX_PAGES 12
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#define RX_START (START_PG+TX_PAGES)
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#define RX_END STOP_PG
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#define AX88796L_BASE_ADDRESS CONFIG_DRIVER_NE2000_BASE
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#define AX88796L_BYTE_ACCESS 0x00001000
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#define AX88796L_OFFSET 0x00000400
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#define AX88796L_ADDRESS_BYTE AX88796L_BASE_ADDRESS + \
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AX88796L_BYTE_ACCESS + AX88796L_OFFSET
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#define AX88796L_REG_MEMR AX88796L_ADDRESS_BYTE + (0x14<<1)
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#define AX88796L_REG_CR AX88796L_ADDRESS_BYTE + (0x00<<1)
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#define AX88796L_CR (*(vu_short *)(AX88796L_REG_CR))
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#define AX88796L_MEMR (*(vu_short *)(AX88796L_REG_MEMR))
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#define EECS_HIGH (AX88796L_MEMR |= 0x10)
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#define EECS_LOW (AX88796L_MEMR &= 0xef)
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#define EECLK_HIGH (AX88796L_MEMR |= 0x80)
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#define EECLK_LOW (AX88796L_MEMR &= 0x7f)
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#define EEDI_HIGH (AX88796L_MEMR |= 0x20)
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#define EEDI_LOW (AX88796L_MEMR &= 0xdf)
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#define EEDO ((AX88796L_MEMR & 0x40)>>6)
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#define PAGE0_SET (AX88796L_CR &= 0x3f)
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#define PAGE1_SET (AX88796L_CR = (AX88796L_CR & 0x3f) | 0x40)
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#define BIT_DUMMY 0
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#define MAC_EEP_READ 1
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#define MAC_EEP_WRITE 2
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#define MAC_EEP_ERACE 3
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#define MAC_EEP_EWEN 4
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#define MAC_EEP_EWDS 5
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/* R7780MP Specific code */
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#if defined(CONFIG_R7780MP)
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#define ISA_OFFSET 0x1400
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#define DP_IN(_b_, _o_, _d_) (_d_) = \
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*( (vu_short *) ((_b_) + ((_o_) * 2) + ISA_OFFSET))
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#define DP_OUT(_b_, _o_, _d_) \
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*((vu_short *)((_b_) + ((_o_) * 2) + ISA_OFFSET)) = (_d_)
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#define DP_IN_DATA(_b_, _d_) (_d_) = *( (vu_short *) ((_b_) + ISA_OFFSET))
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#define DP_OUT_DATA(_b_, _d_) *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_)
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#else
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/* Please change for your target boards */
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#define ISA_OFFSET 0x0000
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#define DP_IN(_b_, _o_, _d_) (_d_) = *( (vu_short *)((_b_)+(_o_ )+ISA_OFFSET))
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#define DP_OUT(_b_, _o_, _d_) *((vu_short *)((_b_)+(_o_)+ISA_OFFSET)) = (_d_)
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#define DP_IN_DATA(_b_, _d_) (_d_) = *( (vu_short *) ((_b_)+ISA_OFFSET))
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#define DP_OUT_DATA(_b_, _d_) *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_)
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#endif
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/*
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* Set 1 bit data
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*/
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static void ax88796_bitset(u32 bit)
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{
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/* DATA1 */
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if( bit )
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EEDI_HIGH;
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else
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EEDI_LOW;
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EECLK_LOW;
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udelay(1000);
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EECLK_HIGH;
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udelay(1000);
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EEDI_LOW;
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}
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/*
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* Get 1 bit data
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*/
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static u8 ax88796_bitget(void)
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{
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u8 bit;
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EECLK_LOW;
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udelay(1000);
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/* DATA */
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bit = EEDO;
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EECLK_HIGH;
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udelay(1000);
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return bit;
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}
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/*
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* Send COMMAND to EEPROM
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*/
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static void ax88796_eep_cmd(u8 cmd)
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{
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ax88796_bitset(BIT_DUMMY);
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switch(cmd){
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case MAC_EEP_READ:
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ax88796_bitset(1);
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ax88796_bitset(1);
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ax88796_bitset(0);
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break;
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case MAC_EEP_WRITE:
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ax88796_bitset(1);
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ax88796_bitset(0);
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ax88796_bitset(1);
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break;
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case MAC_EEP_ERACE:
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ax88796_bitset(1);
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ax88796_bitset(1);
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ax88796_bitset(1);
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break;
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case MAC_EEP_EWEN:
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ax88796_bitset(1);
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ax88796_bitset(0);
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ax88796_bitset(0);
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break;
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case MAC_EEP_EWDS:
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ax88796_bitset(1);
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ax88796_bitset(0);
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ax88796_bitset(0);
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break;
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default:
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break;
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}
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}
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static void ax88796_eep_setaddr(u16 addr)
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{
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int i ;
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for( i = 7 ; i >= 0 ; i-- )
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ax88796_bitset(addr & (1 << i));
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}
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/*
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* Get data from EEPROM
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*/
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static u16 ax88796_eep_getdata(void)
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{
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ushort data = 0;
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int i;
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ax88796_bitget(); /* DUMMY */
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for( i = 0 ; i < 16 ; i++ ){
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data <<= 1;
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data |= ax88796_bitget();
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}
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return data;
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}
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static void ax88796_mac_read(u8 *buff)
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{
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int i ;
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u16 data, addr = 0;
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for( i = 0 ; i < 3; i++ )
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{
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EECS_HIGH;
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EEDI_LOW;
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udelay(1000);
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/* READ COMMAND */
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ax88796_eep_cmd(MAC_EEP_READ);
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/* ADDRESS */
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ax88796_eep_setaddr(addr++);
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/* GET DATA */
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data = ax88796_eep_getdata();
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*buff++ = (uchar)(data & 0xff);
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*buff++ = (uchar)((data >> 8) & 0xff);
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EECLK_LOW;
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EEDI_LOW;
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EECS_LOW;
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}
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}
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int get_prom(u8* mac_addr)
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{
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u8 prom[32];
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int i;
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ax88796_mac_read(prom);
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for (i = 0; i < 6; i++){
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mac_addr[i] = prom[i];
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}
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return 1;
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}
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#endif /* __DRIVERS_AX88796L_H__ */
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