upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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108 lines
2.8 KiB
108 lines
2.8 KiB
/*
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* Copyright (C) 2007 - 2010
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* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
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*
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* board/shmin/shmin.c
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Copy board_flash_get_legacy() from board/freescale/m54455evb/m54455evb.c
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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int checkboard(void)
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{
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puts("BOARD: T-SH7706LAN ");
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if(readb(0xb0008006) == 0xab)
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puts("v2\n");
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else
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puts("v1\n");
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return 0;
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}
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int board_init(void)
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{
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writew(0x2980, BCR2);
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return 0;
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}
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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return 0;
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}
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void led_set_state(unsigned short value)
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{
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}
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#if defined(CONFIG_FLASH_CFI_LEGACY)
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#include <flash.h>
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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{
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int sect[] = CONFIG_SYS_ATMEL_SECT;
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int sectsz[] = CONFIG_SYS_ATMEL_SECTSZ;
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int i, j, k;
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if (base != CONFIG_SYS_ATMEL_BASE)
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return 0;
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info->flash_id = 0x01000000;
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info->portwidth = 1;
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info->chipwidth = 1;
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info->buffer_size = 1;
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info->erase_blk_tout = 16384;
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info->write_tout = 2;
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info->buffer_write_tout = 5;
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info->vendor = 0xFFF0; /* CFI_CMDSET_AMD_LEGACY */
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info->cmd_reset = 0x00F0;
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info->interface = FLASH_CFI_X8;
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info->legacy_unlock = 0;
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info->manufacturer_id = (u16) ATM_MANUFACT;
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info->device_id = ATM_ID_LV040;
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info->device_id2 = 0;
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info->ext_addr = 0;
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info->cfi_version = 0x3133;
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info->cfi_offset = 0x0000;
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info->addr_unlock1 = 0x00000555;
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info->addr_unlock2 = 0x000002AA;
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info->name = "CFI conformant";
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info->size = 0;
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info->sector_count = CONFIG_SYS_ATMEL_TOTALSECT;
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info->start[0] = base;
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for (k = 0, i = 0; i < CONFIG_SYS_ATMEL_REGION; i++) {
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info->size += sect[i] * sectsz[i];
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for (j = 0; j < sect[i]; j++, k++) {
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info->start[k + 1] = info->start[k] + sectsz[i];
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info->protect[k] = 0;
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}
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}
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return 1;
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}
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#endif /* CONFIG_FLASH_CFI_LEGACY */
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