upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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53 lines
1.1 KiB
53 lines
1.1 KiB
/*
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* TNETV107X: Clock APIs
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_CLOCK_H
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#define __ASM_ARCH_CLOCK_H
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#define PSC_MDCTL_NEXT_SWRSTDISABLE 0x0
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#define PSC_MDCTL_NEXT_SYNCRST 0x1
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#define PSC_MDCTL_NEXT_DISABLE 0x2
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#define PSC_MDCTL_NEXT_ENABLE 0x3
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#define CONFIG_SYS_INT_OSC_FREQ 24000000
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#ifndef __ASSEMBLY__
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/* PLL identifiers */
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enum pll_type_e {
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SYS_PLL,
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TDM_PLL,
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ETH_PLL
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};
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/* PLL configuration data */
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struct pll_init_data {
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int pll;
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int internal_osc;
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unsigned long pll_freq;
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unsigned long div_freq[10];
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};
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void init_plls(int num_pll, struct pll_init_data *config);
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int lpsc_status(unsigned int mod);
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void lpsc_control(int mod, unsigned long state, int lrstz);
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unsigned long clk_get_rate(unsigned int clk);
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unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
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int clk_set_rate(unsigned int clk, unsigned long hz);
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static inline void clk_enable(unsigned int mod)
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{
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lpsc_control(mod, PSC_MDCTL_NEXT_ENABLE, -1);
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}
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static inline void clk_disable(unsigned int mod)
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{
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lpsc_control(mod, PSC_MDCTL_NEXT_DISABLE, -1);
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}
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#endif
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#endif
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