upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/board/mosaixtech/icon/chip_config.c

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961 B

/*
* (C) Copyright 2009-2010
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/ppc4xx_config.h>
struct ppc4xx_config ppc4xx_config_val[] = {
{
"400-133", "CPU: 400 PLB: 133 OPB: 66 EBC: 66",
{ 0x86, 0x78, 0xc2, 0xc6, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"500-166", "CPU: 500 PLB: 166 OPB: 83 EBC: 83",
{ 0x87, 0x78, 0xf2, 0xc6, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"533-133", "CPU: 533 PLB: 133 OPB: 66 EBC: 66",
{ 0x87, 0x79, 0x02, 0x52, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"667-133", "CPU: 667 PLB: 133 OPB: 66 EBC: 66",
{ 0x87, 0x79, 0x42, 0x56, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"667-166", "CPU: 667 PLB: 166 OPB: 83 EBC: 83",
{ 0x87, 0x79, 0x42, 0x06, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"800-160", "CPU: 800 PLB: 160 OPB: 53 EBC: 17",
{ 0x86, 0x79, 0x81, 0xa7, 0x07, 0xa5, 0x04, 0xe1 }
},
};
int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);