upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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143 lines
3.2 KiB
143 lines
3.2 KiB
/*
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* Copyright (C) 2004-2007 ARM Limited.
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* Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* As a special exception, if other files instantiate templates or use macros
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* or inline functions from this file, or you compile this file and link it
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* with other works to produce a work based on this file, this file does not
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* by itself cause the resulting work to be covered by the GNU General Public
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* License. However the source code for this file must still be made available
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* in accordance with section (3) of the GNU General Public License.
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* This exception does not invalidate any other reasons why a work based on
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* this file might be covered by the GNU General Public License.
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*/
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#include <common.h>
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#if defined(CONFIG_CPU_V6)
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/*
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* ARMV6
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*/
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#define DCC_RBIT (1 << 30)
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#define DCC_WBIT (1 << 29)
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#define write_dcc(x) \
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__asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x))
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#define read_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x))
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#define status_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x))
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#elif defined(CONFIG_CPU_XSCALE)
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/*
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* XSCALE
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*/
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#define DCC_RBIT (1 << 31)
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#define DCC_WBIT (1 << 28)
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#define write_dcc(x) \
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__asm__ volatile ("mcr p14, 0, %0, c8, c0, 0\n" : : "r" (x))
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#define read_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c9, c0, 0\n" : "=r" (x))
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#define status_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x))
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#else
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#define DCC_RBIT (1 << 0)
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#define DCC_WBIT (1 << 1)
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#define write_dcc(x) \
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__asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x))
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#define read_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x))
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#define status_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x))
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#endif
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#define can_read_dcc(x) do { \
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status_dcc(x); \
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x &= DCC_RBIT; \
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} while (0);
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#define can_write_dcc(x) do { \
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status_dcc(x); \
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x &= DCC_WBIT; \
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x = (x == 0); \
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} while (0);
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#define TIMEOUT_COUNT 0x4000000
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int arm_dcc_init(void)
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{
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return 0;
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}
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int arm_dcc_getc(void)
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{
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int ch;
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register unsigned int reg;
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do {
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can_read_dcc(reg);
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} while (!reg);
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read_dcc(ch);
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return ch;
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}
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void arm_dcc_putc(char ch)
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{
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register unsigned int reg;
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unsigned int timeout_count = TIMEOUT_COUNT;
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while (--timeout_count) {
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can_write_dcc(reg);
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if (reg)
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break;
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}
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if (timeout_count == 0)
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return;
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else
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write_dcc(ch);
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}
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void arm_dcc_puts(const char *s)
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{
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while (*s)
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arm_dcc_putc(*s++);
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}
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int arm_dcc_tstc(void)
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{
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register unsigned int reg;
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can_read_dcc(reg);
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return reg;
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}
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__weak struct serial_device *default_serial_console(void)
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{
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return NULL;
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}
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